Kishor Kunal

Kishor Kunal

University of Minnesota-Twin Cities

H-index: 6

North America-United States

About Kishor Kunal

Kishor Kunal, With an exceptional h-index of 6 and a recent h-index of 6 (since 2020), a distinguished researcher at University of Minnesota-Twin Cities, specializes in the field of CAD, VLSI, Layout automation.

His recent articles reflect a diverse array of research interests and contributions to the field:

Assessing Economic Viability: A Comparative Analysis of Total Cost of Ownership for Domain-Adapted Large Language Models versus State-of-the-art Counterparts in Chip Design …

Reinforcing the Connection between Analog Design and EDA

Automated synthesis of mixed-signal ML inference hardware under accuracy constraints

Chipnemo: Domain-adapted llms for chip design

Understanding Distance-Dependent Variations for Analog Circuits in a FinFET Technology

A Multicore GNN Training Accelerator

GNN-based hierarchical annotation for analog circuits

A Unified Engine for Accelerating GNN Weighting/Aggregation Operations, with Efficient Load Balancing and Graph-Specific Caching

Kishor Kunal Information

University

Position

___

Citations(all)

264

Citations(since 2020)

264

Cited By

41

hIndex(all)

6

hIndex(since 2020)

6

i10Index(all)

5

i10Index(since 2020)

5

Email

University Profile Page

Google Scholar

Kishor Kunal Skills & Research Interests

CAD

VLSI

Layout automation

Top articles of Kishor Kunal

Assessing Economic Viability: A Comparative Analysis of Total Cost of Ownership for Domain-Adapted Large Language Models versus State-of-the-art Counterparts in Chip Design …

arXiv preprint arXiv:2404.08850

2024/4/12

Reinforcing the Connection between Analog Design and EDA

2024/1/22

Automated synthesis of mixed-signal ML inference hardware under accuracy constraints

2024/1/22

Chipnemo: Domain-adapted llms for chip design

arXiv preprint arXiv:2311.00176

2023/10/31

Understanding Distance-Dependent Variations for Analog Circuits in a FinFET Technology

2023/9/11

A Multicore GNN Training Accelerator

2023/8/7

GNN-based hierarchical annotation for analog circuits

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

2023/1/11

A Unified Engine for Accelerating GNN Weighting/Aggregation Operations, with Efficient Load Balancing and Graph-Specific Caching

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

2022/12/27

GNNIE: GNN inference engine with load-balancing and graph-specific caching

2022/7/10

Analog Design Automation in the Era of Machine Learning

2022

Kishor Kunal
Kishor Kunal

H-Index: 3

BeGAN: Power grid benchmark generation using a process-portable GAN-based methodology

2021/11/1

Kishor Kunal
Kishor Kunal

H-Index: 3

Masoud Zabihi
Masoud Zabihi

H-Index: 4

Machine Learning Techniques in Analog Layout Automation

2021/3/22

Fast and efficient constraint evaluation of analog layout using machine learning models

2021/1/18

ALIGN: A system for automating analog layout

IEEE Design & Test

2020/12/3

The ALIGN open-source analog layout generator: V1. 0 and beyond

2020/11/2

A general approach for identifying hierarchical symmetry constraints for analog circuit layout

2020/11/2

Learning from Experience: Applying ML to Analog Circuit Design

2020/3/30

GANA: Graph convolutional network based automated netlist annotation for analog circuits

2020/3/9

See List of Professors in Kishor Kunal University(University of Minnesota-Twin Cities)

Co-Authors

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