Meghna Madhusudan
University of Minnesota-Twin Cities
H-index: 9
North America-United States
Top articles of Meghna Madhusudan
Reinforcing the Connection between Analog Design and EDA
2024/1/22
Understanding Distance-Dependent Variations for Analog Circuits in a FinFET Technology
2023/9/11
MMM: Machine Learning-Based Macro-Modeling for Linear Analog ICs and ADC/DACs
2023/9/10
A generalized methodology for well island generation and well-tap insertion in analog/mixed-signal layouts
ACM Transactions on Design Automation of Electronic Systems
2023/9/9
Constructive placement and routing for common-centroid capacitor arrays in binary-weighted and split DACs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
2023/1/23
GNN-based hierarchical annotation for analog circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
2023/1/11
Performance-driven wire sizing for analog integrated circuits
ACM Transactions on Design Automation of Electronic Systems
2022/12/24
Meghna Madhusudan
H-Index: 5
Arvind Sharma
H-Index: 5
Sachin Sapatnekar
H-Index: 30
Ramesh Harjani
H-Index: 19
Jiang Hu
H-Index: 23
Machine Learning for Analog Layout
2022/8/10
Analog/Mixed-Signal Layout Optimization using Optimal Well Taps.
2022/4/13
Constructive common-centroid placement and routing for binary-weighted capacitor arrays
2022/3/14
Are analytical techniques worthwhile for analog IC placement?
2022/3/14
Common-centroid layout for active and passive devices: A review and the road ahead
2022/1/17
Meghna Madhusudan
H-Index: 5
Ramesh Harjani
H-Index: 19
Performance-aware common-centroid placement and routing of transistor arrays in analog circuits
2021/11/1
Meghna Madhusudan
H-Index: 5
Ramesh Harjani
H-Index: 19
From specification to silicon: Towards analog/mixed-signal design automation using surrogate NN models with transfer learning
2021/11/1
A circuit attention network-based actor-critic learning approach to robust analog transistor sizing
2021/8/30
Meghna Madhusudan
H-Index: 5
Arvind Sharma
H-Index: 5
Sachin Sapatnekar
H-Index: 30
Ramesh Harjani
H-Index: 19
Jiang Hu
H-Index: 23
Machine Learning Techniques in Analog Layout Automation
2021/3/22
Analog layout generation using optimized primitives
2021/2/1
Meghna Madhusudan
H-Index: 5
Jiang Hu
H-Index: 23
Common-centroid layouts for analog circuits: Advantages and limitations
2021/2/1
Meghna Madhusudan
H-Index: 5
Ramesh Harjani
H-Index: 19
Fast and efficient constraint evaluation of analog layout using machine learning models
2021/1/18
ALIGN: A system for automating analog layout
IEEE Design & Test
2020/12/3
