Sachin Sapatnekar
University of Minnesota-Twin Cities
H-index: 67
North America-United States
Top articles of Sachin Sapatnekar
COBI: A Coupled Oscillator Based Ising Chip for Combinatorial Optimization
2024/4/24
ECO-CHIP: Estimation of Carbon Footprint of Chiplet-based Architectures for Sustainable VLSI
2024/3/2
2.5 A 28nm Physical-Based Ray-Tracing Rendering Processor for Photorealistic Augmented Reality with Inverse Rendering and Background Clustering for Mobile Devices
2024/2/18
Sachin Sapatnekar
H-Index: 30
Jie Gu
H-Index: 3
IR-Aware ECO Timing Optimization Using Reinforcement Learning
arXiv preprint arXiv:2402.07781
2024/2/12
Reinforcing the Connection between Analog Design and EDA
2024/1/22
Automated synthesis of mixed-signal ML inference hardware under accuracy constraints
2024/1/22
Recent progress in the analysis of electromigration and stress migration in large multisegment interconnects
2023/3/26
An aging model for current DACs, and its application to analyzing lifetime degradation in a wireline equalizer
Microelectronics Reliability
2023/3/1
Constructive placement and routing for common-centroid capacitor arrays in binary-weighted and split DACs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
2023/1/23
A 48-node all-to-all connected coupled ring oscillator ising solver chip
2023/1/20
Sachin Sapatnekar
H-Index: 30
Reusing GEMM hardware for efficient execution of depthwise separable convolution on ASIC-based DNN accelerators
2023/1/16
GNN-based hierarchical annotation for analog circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
2023/1/11
Experimental demonstration of magnetic tunnel junction-based computational random-access memory
arXiv preprint arXiv:2312.14264
2023/12/21
A Machine Learning Approach to Improving Timing Consistency between Global Route and Detailed Route
ACM Transactions on Design Automation of Electronic Systems
2023/12/18
PimCity: A Compute in Memory Substrate featuring both Row and Column Parallel Computing
2023/12/5
Frequency-Domain Transient Electromigration Analysis Using Circuit Theory
2023/10/28
An Ising solver chip based on coupled ring oscillators with a 48-node all-to-all connected array architecture
Nature Electronics
2023/10
Sachin Sapatnekar
H-Index: 30
3SAT on an All-to-All-Connected CMOS Ising Solver Chip
arXiv preprint arXiv:2309.11017
2023/9/20
Understanding Distance-Dependent Variations for Analog Circuits in a FinFET Technology
2023/9/11
MMM: Machine Learning-Based Macro-Modeling for Linear Analog ICs and ADC/DACs
2023/9/10
