Tonmoy Dhar

Tonmoy Dhar

University of Minnesota-Twin Cities

H-index: 6

North America-United States

About Tonmoy Dhar

Tonmoy Dhar, With an exceptional h-index of 6 and a recent h-index of 6 (since 2020), a distinguished researcher at University of Minnesota-Twin Cities, specializes in the field of Reliability, analog and mixed signal circuits, design automation.

His recent articles reflect a diverse array of research interests and contributions to the field:

An aging model for current DACs, and its application to analyzing lifetime degradation in a wireline equalizer

GNN-based hierarchical annotation for analog circuits

Machine Learning for Analog Layout

A charge flow formulation for guiding analog/mixed-signal placement

Machine Learning Techniques in Analog Layout Automation

Aging of current DACs and its impact in equalizer circuits

Fast and efficient constraint evaluation of analog layout using machine learning models

ALIGN: A system for automating analog layout

Tonmoy Dhar Information

University

Position

___

Citations(all)

179

Citations(since 2020)

178

Cited By

33

hIndex(all)

6

hIndex(since 2020)

6

i10Index(all)

3

i10Index(since 2020)

3

Email

University Profile Page

Google Scholar

Tonmoy Dhar Skills & Research Interests

Reliability

analog and mixed signal circuits

design automation

Top articles of Tonmoy Dhar

An aging model for current DACs, and its application to analyzing lifetime degradation in a wireline equalizer

Microelectronics Reliability

2023/3/1

GNN-based hierarchical annotation for analog circuits

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

2023/1/11

A charge flow formulation for guiding analog/mixed-signal placement

2022/3/14

Machine Learning Techniques in Analog Layout Automation

2021/3/22

Aging of current DACs and its impact in equalizer circuits

2021/3/21

Fast and efficient constraint evaluation of analog layout using machine learning models

2021/1/18

ALIGN: A system for automating analog layout

IEEE Design & Test

2020/12/3

The ALIGN open-source analog layout generator: V1. 0 and beyond

2020/11/2

A general approach for identifying hierarchical symmetry constraints for analog circuit layout

2020/11/2

Learning from Experience: Applying ML to Analog Circuit Design

2020/3/30

GANA: Graph convolutional network based automated netlist annotation for analog circuits

2020/3/9

See List of Professors in Tonmoy Dhar University(University of Minnesota-Twin Cities)