Yandong Luo
Georgia Institute of Technology
H-index: 16
North America-United States
Top articles of Yandong Luo
H3D-Transformer: A Heterogeneous 3D (H3D) Computing Platform for Transformer Model Acceleration on Edge Devices
ACM Transactions on Design Automation of Electronic Systems
2024
Yandong Luo
H-Index: 7
Shimeng Yu
H-Index: 54
A FeFET-Based ADC Offset Robust Compute-In-Memory Architecture for Streaming Keyword Spotting (KWS)
IEEE Transactions on Emerging Topics in Computing
2023/12/28
Yandong Luo
H-Index: 7
Shimeng Yu
H-Index: 54
RAWAtten: Reconfigurable accelerator for window attention in hierarchical vision transformers
2023/4/17
3-d heterogeneous integration of rram-based compute-in-memory: Impact of integration parameters on inference accuracy
IEEE Transactions on Electron Devices
2022/12/29
BEOL Compatible Ferroelectric Routers for Run-time Reconfigurable Compute-in-Memory Accelerators
2022/6/12
A compute-in-memory hardware accelerator design with back-end-of-line (BEOL) transistor based reconfigurable interconnect
IEEE Journal on Emerging and Selected Topics in Circuits and Systems
2022/5/23
An algorithm-hardware co-design for bayesian neural network utilizing SOT-MRAM’s inherent stochasticity
IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
2022/5/23
Yandong Luo
H-Index: 7
Shimeng Yu
H-Index: 54
Performance Benchmarking of Spin-Orbit Torque Magnetic RAM (SOT-MRAM) for Deep Neural Network (DNN) Accelerators
2022/5/15
BEOL-compatible superlattice FEFET analog synapse with improved linearity and symmetry of weight update
IEEE Transactions on Electron Devices
2022/1/25
Accelerating On-Chip Training with Ferroelectric-Based Hybrid Precision Synapse
ACM Journal on Emerging Technologies in Computing Systems (JETC)
2022/1/12
Monolithic 3D compute-in-memory accelerator with BEOL transistor based reconfigurable interconnect
2021/12/11
BEOL compatible superlattice FerroFET-based high precision analog weight cell with superior linearity and symmetry
2021/12/11
A ferroelectric-based volatile/non-volatile dual-mode buffer memory for deep neural network accelerators
IEEE Transactions on Computers
2021/10/27
Yandong Luo
H-Index: 7
Shimeng Yu
H-Index: 54
Thermal reliability considerations of resistive synaptic devices for 3D CIM system performance
2021/10/26
A runtime reconfigurable design of compute-in-memory–based hardware accelerator for deep learning inference
ACM Transactions on Design Automation of Electronic Systems (TODAES)
2021/6/28
Exploiting process variations to protect machine learning inference engine from chip cloning
2021/5/22
RRAM for compute-in-memory: From inference to training
2021/4/16
First experimental demonstration of robust HZO/β-Ga₂O₃ ferroelectric field-effect transistors as synaptic devices for artificial intelligence applications in a high …
IEEE Transactions on Electron Devices
2021/3/19
A FeRAM based Volatile/Non-volatile Dual-mode Buffer Memory for Deep Neural Network Training
2021/2/1
Yandong Luo
H-Index: 7
Shimeng Yu
H-Index: 54
AILC: Accelerate on-chip incremental learning with compute-in-memory technology
IEEE Transactions on Computers
2021/1/20
Yandong Luo
H-Index: 7
Shimeng Yu
H-Index: 54
