Wantong Li
Georgia Institute of Technology
H-index: 8
North America-United States
Top articles of Wantong Li
Design and Thermal Analysis of 2.5D and 3D Integrated System of a CMOS Image Sensor and a Sparsity-Aware Accelerator for Autonomous Driving
IEEE Journal of the Electron Devices Society (JEDS)
2024/1/17
NeuroSim V1.4: Extending Technology Support for Digital Compute-in-Memory Toward 1nm Node
IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I)
2024
Enabling Ultra-Low Power Ultrasound Imaging with Compute-in-Memory Sparse Reconstruction Accelerator
2023/10/19
H3DAtten: Heterogeneous 3-D Integrated Hybrid Analog and Digital Compute-in-Memory Accelerator for Vision Transformer Self-Attention
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
2023/8/8
A Reconfigurable Monolithic 3D Switched-Capacitor DC-DC Converter with Back-End-of-Line Oxide Channel Transistor
2023/8/6
Wantong Li
H-Index: 1
Shimeng Yu
H-Index: 54
Efficient & Reliable RRAM-based Compute-in-Memory for Edge Intelligence
2023/7/9
Wantong Li
H-Index: 1
Optimization Strategies for Digital Compute-in-Memory from Comparative Analysis with Systolic Array
2023/6/11
Enabling Long-Term Robustness in RRAM-based Compute-In-Memory Edge Devices
2023/5/21
Machine Learning Algorithm Co-Design for a 40 nm RRAM Analog Compute-in-Memory Accelerator
2023/4/23
RAWAtten: Reconfigurable Accelerator for Window Attention in Hierarchical Vision Transformers
2023/4/17
Temporal Frame Filtering for Autonomous Driving Using 3D-Stacked Global Shutter CIS With IWO Buffer Memory and Near-Pixel Compute
IEEE Transactions on Circuits and Systems I: Regular Papers
2023/3/10
Thermal Modeling of 2.5D Integrated Package of CMOS Image Sensor and FPGA for Autonomous Driving
2023/3/7
BEOL Compatible Oxide Power Transistors for On-Chip Voltage Conversion in Heterogenous 3D (H3D) Integrated Circuits
2023/12/9
MAC-ECC: In-Situ Error Correction and Its Design Methodology for Reliable NVM-Based Compute-in-Memory Inference Engine
IEEE Journal on Emerging and Selected Topics in Circuits and Systems
2022/11/17
ENNA: An Efficient Neural Network Accelerator Design Based on ADC-Free Compute-In-Memory Subarrays
IEEE Transactions on Circuits and Systems I: Regular Papers
2022/10/10
A 40nm RRAM Compute-in-Memory Macro with Parallelism-Preserving ECC for Iso-Accuracy Voltage Scaling
2022/9/19
A Method for Reverse Engineering Neural Network Parameters from Compute-in-Memory Accelerators
2022/7/4
Temporal Frame Filtering with Near-Pixel Compute for Autonomous Driving
2022/6/13
A 40nm Analog-Input ADC-Free Compute-in-Memory RRAM Macro with Pulse-Width Modulation between Sub-arrays
2022/6/12
A 40-nm MLC-RRAM Compute-in-Memory Macro With Sparsity Control, On-Chip Write-Verify, and Temperature-Independent ADC References
IEEE Journal of Solid-State Circuits
2022/4/12