Vivienne Sze

Vivienne Sze

Massachusetts Institute of Technology

H-index: 51

North America-United States

About Vivienne Sze

Vivienne Sze, With an exceptional h-index of 51 and a recent h-index of 39 (since 2020), a distinguished researcher at Massachusetts Institute of Technology, specializes in the field of VLSI, Low-Power Design, Machine Learning, Robotics, Video Coding.

His recent articles reflect a diverse array of research interests and contributions to the field:

Context Adaptive Binary Arithmetic Coding and Bypass Coding

Modeling Analog-Digital-Converter Energy and Area for Compute-In-Memory Accelerator Design

Prevention of start code confusion

The Climate and Sustainability Implications of Generative AI

GMMap: Memory-Efficient Continuous Occupancy Map Using Gaussian Mixture Model

Gemino: Practical and Robust Neural Compression for Video Conferencing

Tailors: Accelerating Sparse Tensor Algebra by Overbooking Buffer Capacity

HighLight: Efficient and Flexible DNN Acceleration with Hierarchical Structured Sparsity

Vivienne Sze Information

University

Position

Associate Professor EECS at

Citations(all)

19270

Citations(since 2020)

15118

Cited By

10112

hIndex(all)

51

hIndex(since 2020)

39

i10Index(all)

106

i10Index(since 2020)

87

Email

University Profile Page

Google Scholar

Vivienne Sze Skills & Research Interests

VLSI

Low-Power Design

Machine Learning

Robotics

Video Coding

Top articles of Vivienne Sze

Context Adaptive Binary Arithmetic Coding and Bypass Coding

2024/4/18

Modeling Analog-Digital-Converter Energy and Area for Compute-In-Memory Accelerator Design

arXiv preprint arXiv:2404.06553

2024/4/9

Vivienne Sze
Vivienne Sze

H-Index: 35

Prevention of start code confusion

2024/4/4

The Climate and Sustainability Implications of Generative AI

2024/3/27

GMMap: Memory-Efficient Continuous Occupancy Map Using Gaussian Mixture Model

IEEE Transactions on Robotics

2024/1/1

Gemino: Practical and Robust Neural Compression for Video Conferencing

arXiv preprint arXiv:2209.10507

2022/9/21

Tailors: Accelerating Sparse Tensor Algebra by Overbooking Buffer Capacity

2023/10/28

Yannan Nellie Wu
Yannan Nellie Wu

H-Index: 2

Vivienne Sze
Vivienne Sze

H-Index: 35

HighLight: Efficient and Flexible DNN Acceleration with Hierarchical Structured Sparsity

2023/10/28

Raella: Reforming the arithmetic for efficient, low-resolution, and low-loss analog PIM: No retraining required!

2023/6/17

Vivienne Sze
Vivienne Sze

H-Index: 35

LoopTree: Enabling Exploration of Fused-layer Dataflow Accelerators

2023/4/23

Yannan Nellie Wu
Yannan Nellie Wu

H-Index: 2

Vivienne Sze
Vivienne Sze

H-Index: 35

Individualized Tracking of Neurocognitive-State-Dependent Eye-Movement Features Using Mobile Devices

Proceedings of the ACM on Interactive, Mobile, Wearable and Ubiquitous Technologies

2023/3/28

Data Centers on Wheels: Emissions from Computing Onboard Autonomous Vehicles

IEEE Micro

2022/11/8

Vivienne Sze
Vivienne Sze

H-Index: 35

Sertac Karaman
Sertac Karaman

H-Index: 43

RETROSPECTIVE: Eyeriss: An Energy-Efficient Reconfigurable Accelerator for Deep Convolutional Neural Networks

2023

Yu-Hsin Chen
Yu-Hsin Chen

H-Index: 2

Vivienne Sze
Vivienne Sze

H-Index: 35

Sparseloop: An Analytical Approach To Sparse Tensor Accelerator Modeling

2022/10/1

Yannan Nellie Wu
Yannan Nellie Wu

H-Index: 2

Vivienne Sze
Vivienne Sze

H-Index: 35

Method and apparatus for parallelizing context selection in video processing

2022/8/9

Memory-Efficient Gaussian Fitting for Depth Images in Real Time

2022/5/23

Uncertainty from Motion for DNN Monocular Depth Estimation

2022/5/23

Vivienne Sze
Vivienne Sze

H-Index: 35

Sertac Karaman
Sertac Karaman

H-Index: 43

Freely scalable and reconfigurable optical hardware for deep learning

Scientific reports

2021/2/4

Searching for efficient multi-stage vision transformers

ICCV Workshop on Neural Architectures: Past, Present and Future

2021

Sertac Karaman
Sertac Karaman

H-Index: 43

Vivienne Sze
Vivienne Sze

H-Index: 35

NetAdaptV2: Efficient Neural Architecture Search With Fast Super-Network Training and Architecture Optimization

2021

Tien-Ju Yang
Tien-Ju Yang

H-Index: 13

Vivienne Sze
Vivienne Sze

H-Index: 35

See List of Professors in Vivienne Sze University(Massachusetts Institute of Technology)

Co-Authors

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