Vivienne Sze

Vivienne Sze

Massachusetts Institute of Technology

H-index: 51

North America-United States

About Vivienne Sze

Vivienne Sze, With an exceptional h-index of 51 and a recent h-index of 39 (since 2020), a distinguished researcher at Massachusetts Institute of Technology, specializes in the field of VLSI, Low-Power Design, Machine Learning, Robotics, Video Coding.

His recent articles reflect a diverse array of research interests and contributions to the field:

The Climate and Sustainability Implications of Generative AI

GMMap: Memory-Efficient Continuous Occupancy Map Using Gaussian Mixture Model

Gemino: Practical and Robust Neural Compression for Video Conferencing

Context Adaptive Binary Arithmetic Coding and Bypass Coding

Modeling Analog-Digital-Converter Energy and Area for Compute-In-Memory Accelerator Design

Prevention of start code confusion

Raella: Reforming the arithmetic for efficient, low-resolution, and low-loss analog PIM: No retraining required!

LoopTree: Enabling Exploration of Fused-layer Dataflow Accelerators

Vivienne Sze Information

University

Position

Associate Professor EECS at

Citations(all)

19270

Citations(since 2020)

15118

Cited By

10112

hIndex(all)

51

hIndex(since 2020)

39

i10Index(all)

106

i10Index(since 2020)

87

Email

University Profile Page

Massachusetts Institute of Technology

Google Scholar

View Google Scholar Profile

Vivienne Sze Skills & Research Interests

VLSI

Low-Power Design

Machine Learning

Robotics

Video Coding

Top articles of Vivienne Sze

Title

Journal

Author(s)

Publication Date

The Climate and Sustainability Implications of Generative AI

Noman Bashir

Priya Donti

James Cuff

Sydney Sroka

Marija Ilic

...

2024/3/27

GMMap: Memory-Efficient Continuous Occupancy Map Using Gaussian Mixture Model

IEEE Transactions on Robotics

Peter Zhi Xuan Li

Sertac Karaman

Vivienne Sze

2024/1/1

Gemino: Practical and Robust Neural Compression for Video Conferencing

arXiv preprint arXiv:2209.10507

Vibhaalakshmi Sivaraman

Pantea Karimi

Vedantha Venkatapathy

Mehrdad Khani

Sadjad Fouladi

...

2022/9/21

Context Adaptive Binary Arithmetic Coding and Bypass Coding

2024/4/18

Modeling Analog-Digital-Converter Energy and Area for Compute-In-Memory Accelerator Design

arXiv preprint arXiv:2404.06553

Tanner Andrulis

Ruicong Chen

Hae-Seung Lee

Joel S Emer

Vivienne Sze

2024/4/9

Prevention of start code confusion

2024/4/4

Raella: Reforming the arithmetic for efficient, low-resolution, and low-loss analog PIM: No retraining required!

Tanner Andrulis

Joel S Emer

Vivienne Sze

2023/6/17

LoopTree: Enabling Exploration of Fused-layer Dataflow Accelerators

Michael Gilbert

Yannan Nellie Wu

Angshuman Parashar

Vivienne Sze

Joel S Emer

2023/4/23

Individualized Tracking of Neurocognitive-State-Dependent Eye-Movement Features Using Mobile Devices

Proceedings of the ACM on Interactive, Mobile, Wearable and Ubiquitous Technologies

Hsin-Yu Lai

Charles G Sodini

Vivienne Sze

Thomas Heldt

2023/3/28

Data Centers on Wheels: Emissions from Computing Onboard Autonomous Vehicles

IEEE Micro

Soumya Sudhakar

Vivienne Sze

Sertac Karaman

2022/11/8

Tailors: Accelerating Sparse Tensor Algebra by Overbooking Buffer Capacity

Zi Yu Xue

Yannan Nellie Wu

Joel S Emer

Vivienne Sze

2023/10/28

RETROSPECTIVE: Eyeriss: An Energy-Efficient Reconfigurable Accelerator for Deep Convolutional Neural Networks

Yu-Hsin Chen

Joel S Emer

Vivienne Sze

2023

HighLight: Efficient and Flexible DNN Acceleration with Hierarchical Structured Sparsity

Yannan Nellie Wu

Po-An Tsai

Saurav Muralidharan

Angshuman Parashar

Vivienne Sze

...

2023/10/28

Method and apparatus for parallelizing context selection in video processing

2022/8/9

Memory-Efficient Gaussian Fitting for Depth Images in Real Time

Peter Zhi Xuan Li

Sertac Karaman

Vivienne Sze

2022/5/23

Uncertainty from Motion for DNN Monocular Depth Estimation

Soumya Sudhakar

Vivienne Sze

Sertac Karaman

2022/5/23

Sparseloop: An Analytical Approach To Sparse Tensor Accelerator Modeling

Yannan Nellie Wu

Po-An Tsai

Angshuman Parashar

Vivienne Sze

Joel S Emer

2022/10/1

NetAdaptV2: Efficient Neural Architecture Search With Fast Super-Network Training and Architecture Optimization

Tien-Ju Yang

Yi-Lun Liao

Vivienne Sze

2021

Sparse tensor accelerators: Abstraction and modeling

ISCA Tutorial

Joel Emer

Angshuman Parashar

Vivienne Sze

Po-An Tsai

Yannan Nellie Wu

2021/6

Architecture-level energy estimation for heterogeneous computing systems

Francis Wang

Yannan Nellie Wu

Matthew Woicik

Joel S Emer

Vivienne Sze

2021/3/28

See List of Professors in Vivienne Sze University(Massachusetts Institute of Technology)

Co-Authors

H-index: 130
Anantha Chandrakasan

Anantha Chandrakasan

Massachusetts Institute of Technology

H-index: 71
Joel Emer

Joel Emer

Massachusetts Institute of Technology

H-index: 59
Sertac Karaman

Sertac Karaman

Massachusetts Institute of Technology

H-index: 50
Luca Carlone

Luca Carlone

Massachusetts Institute of Technology

H-index: 37
Tushar Krishna

Tushar Krishna

Georgia Institute of Technology

H-index: 27
Thomas Heldt

Thomas Heldt

Massachusetts Institute of Technology

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