SUBRAMANIAN S. IYER

SUBRAMANIAN S. IYER

University of California, Los Angeles

H-index: 62

North America-United States

About SUBRAMANIAN S. IYER

SUBRAMANIAN S. IYER, With an exceptional h-index of 62 and a recent h-index of 26 (since 2020), a distinguished researcher at University of California, Los Angeles, specializes in the field of Microelectronics, System Integration, Packaging, neuromorphic computing.

His recent articles reflect a diverse array of research interests and contributions to the field:

Nonvolative memory devices with charge trap transistor structures and methods of operation thereof

Integrated Micro-Capacitors & Micro-Inductors for Next Generation Electronics

Neural network system with neurons including charge-trap transistors and neural integrators and methods therefor

Demonstration of a Power-efficient and Cost-effective Power Delivery Architecture for Heterogeneously Integrated Wafer-scale Systems

An 8T eNVSRAM Macro in 22nm FDSOI Standard Logic with Simultaneous Full-Array Data Restore for Secure IoT Devices

AI computing reaches for the edge

Apparatus and method for changing the functionality of an integrated circuit using charge trap transistors

3D flexible Fan-Out Wafer-Level Packaging for Wearable Devices

SUBRAMANIAN S. IYER Information

University

Position

___

Citations(all)

16172

Citations(since 2020)

3647

Cited By

13825

hIndex(all)

62

hIndex(since 2020)

26

i10Index(all)

271

i10Index(since 2020)

93

Email

University Profile Page

University of California, Los Angeles

Google Scholar

View Google Scholar Profile

SUBRAMANIAN S. IYER Skills & Research Interests

Microelectronics

System Integration

Packaging

neuromorphic computing

Top articles of SUBRAMANIAN S. IYER

Title

Journal

Author(s)

Publication Date

Nonvolative memory devices with charge trap transistor structures and methods of operation thereof

2024/3/14

Integrated Micro-Capacitors & Micro-Inductors for Next Generation Electronics

IEEE Nanotechnology Magazine

G Ezhilarasu

SS Iyer

2024/2/21

Neural network system with neurons including charge-trap transistors and neural integrators and methods therefor

2024/1/25

Demonstration of a Power-efficient and Cost-effective Power Delivery Architecture for Heterogeneously Integrated Wafer-scale Systems

Haoxiang Ren

Krutikesh Sahoo

Tianyu Xiang

Guangqi Ouyang

Subramanian S Iyer

2023/5/30

An 8T eNVSRAM Macro in 22nm FDSOI Standard Logic with Simultaneous Full-Array Data Restore for Secure IoT Devices

Sepideh Nouri

Subramanian S Iyer

2023/2/19

AI computing reaches for the edge

Science

Subramanian S Iyer

Vwani Roychowdhury

2023/10/20

Apparatus and method for changing the functionality of an integrated circuit using charge trap transistors

2023/6/8

3D flexible Fan-Out Wafer-Level Packaging for Wearable Devices

Guangqi Ouyang

Takafumi Fukushima

Haoxiang Ren

Subramanian S Iyer

2023/5/30

Large Wafer GaN on Silicon Reconstitution with Gold-to-Gold Thermocompression Bonding

Ankit Kuchhangi

Haoxiang Ren

Krutikesh Sahoo

Subramanian S Iyer

2023/5/30

Flexible inorganic microled display device and method of manufacturing thereof

2023/7/27

Low-frequency and random telegraph noise in 14-nm bulk si charge-trap transistors

IEEE Transactions on Electron Devices

Mariia Gorchichko

En Xia Zhang

Mahmud Reaz

Kan Li

Peng Fei Wang

...

2023/4/25

System and method for superconducting silicon interconnect substrate with superconducting quantum processor

2023/7/13

Secure and Scalable Key Management for Waferscale Heterogeneous Integration

Yousef Safari

Pooya Aghanoury

Subramanian S Iyer

Nader Sehatbakhsh

2023/5/30

Advanced Packaging and Heterogenous Integration

Subramanian Iyer

2023/4/17

A High Throughput Two-Stage Die-to-Wafer Thermal Compression Bonding Scheme for Heterogeneous Integration

Krutikesh Sahoo

Haoxiang Ren

Subramanian S Iyer

2023/5/30

Hybrid obfuscation of chiplet-based systems

Yousef Safari

Pooya Aghanoury

Subramanian S Iyer

Nader Sehatbakhsh

Boris Vaisband

2023/7/9

Scaling Heterogenous Integration from Dies to Materials

Subramanian Iyer

2023/4/17

Advanced Packaging Methods Used for Energy Storage from Intermittent Renewable Sources

Takafumi Fukushima

Tianyu Xiang

Harshit Ranjan

Niharika Tripathi

Chang Liu

...

2023/5/30

Heterogeneous Power Delivery for Large Chiplet-based Systems using Integrated GaN/Si-Interconnect Fabric with sub-10 μm Bond Pitch

Haoxiang Ren

Krutikesh Sahoo

Ziyi Guo

Rishi Pugazhendhi

Zachary Wong

...

2023/12/9

Silicon‐Germanium Heterojunction Bipolar Transistors: A Retrospective

75th Anniversary of the Transistor

Subramanian S Iyer

John D Cressler

2023/7/3

See List of Professors in SUBRAMANIAN S. IYER University(University of California, Los Angeles)

Co-Authors

H-index: 60
Steven J. Koester

Steven J. Koester

University of Minnesota-Twin Cities

H-index: 48
M. Goorsky

M. Goorsky

University of California, Los Angeles

H-index: 41
Stefan Zollner

Stefan Zollner

New Mexico State University

H-index: 32
Takafumi Fukushima

Takafumi Fukushima

Tohoku University

H-index: 29
Deok-kee Kim

Deok-kee Kim

Sejong University

H-index: 12
SivaChandra Jangam

SivaChandra Jangam

University of California, Los Angeles

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