Mihai T. Lazarescu
Politecnico di Torino
H-index: 17
Europe-Italy
Top articles of Mihai T. Lazarescu
Title | Journal | Author(s) | Publication Date |
|---|---|---|---|
Mix & Latch: Comparison With State-of-the-Art Retiming On a RISC-V Benchmark | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | Lorenzo Lagostina Filippo Minnella Jordi Cortadella Mario R Casu Mihai T Lazarescu | 2024/1/31 |
Enhanced Exploration of Neural Network Models for Indoor Human Monitoring | Giorgia Subbicini Luciano Lavagno Mihai T Lazarescu | 2023/6/8 | |
Mix & Latch: An Optimization Flow for High-Performance Designs with Single-Clock Mixed-Polarity Latches and Flip-Flops | IEEE access | Filippo Minnella Jordi Cortadella Mario R Casu Mihai T Lazarescu Luciano Lavagno | 2023/4/10 |
Design and Optimization of Residual Neural Network Accelerators for Low-Power FPGAs Using High-Level Synthesis | arXiv preprint arXiv:2309.15631 | Filippo Minnella Teodoro Urso Mihai T Lazarescu Luciano Lavagno | 2023/9/27 |
A DSP shared is a DSP earned: HLS Task-Level Multi-Pumping for High-Performance Low-Resource Designs | Giovanni Brignone Mihai T Lazarescu Luciano Lavagno | 2023/11/6 | |
A Graph Neural Network Model for Fast and Accurate Quality of Result Estimation for High-Level Synthesis | IEEE Access | M Usman Jamal Zhuowei Li Mihai T Lazarescu Luciano Lavagno | 2023/8/9 |
CUDA-Optimized GPU Acceleration of 3GPP 3D Channel Model Simulations for 5G Network Planning | Electronics | Nasir Ali Shah Mihai T Lazarescu Roberto Quasso Luciano Lavagno | 2023/7/25 |
Drift rejection differential frontend for single plate capacitive sensors | IEEE Sensors Journal | Giorgia Subbicini Luciano Lavagno Mihai T Lazarescu | 2022/7/13 |
Robustness and reliability of a 1D-ConvNet in trajectory prediction with data augmentation from capacitive sensors | Ivan Airola Sciot | 2022/4/13 | |
Research on Tagless indoor person localization system | Runxin Du | 2022/4/13 | |
Subgraph isomorphism acceleration on FPGAs using High-Level Synthesis | Roberto Bosio | 2022/12/20 | |
FPGA Acceleration of 3GPP Channel Model Emulator for 5G New Radio | IEEE Access | Nasir Ali Shah Mihai T Lazarescu Roberto Quasso Salvatore Scarpina Luciano Lavagno | 2022/11/9 |
Array-specific dataflow caches for high-level synthesis of memory-intensive algorithms on FPGAs | IEEE Access | Giovanni Brignone M Usman Jamal Mihai T Lazarescu Luciano Lavagno | 2022/11/4 |
FPGA-based Deep LearningInference Acceleration at the Edge | Andrea Casale | 2021/4/16 | |
High-level annotation of routing congestion for xilinx vivado hls designs | IEEE Access | Osama Bin Tariq Junnan Shan Georgios Floros Christos P Sotiriou Mario R Casu | 2021/3/19 |
Neural networks for indoor person tracking with infrared sensors | IEEE Sensors Letters | Osama Bin Tariq Mihai Teodor Lazarescu Luciano Lavagno | 2021/1/6 |
Implementation of a Convolutional Neural Network Algorithm on FPGA Using High-Level Synthesis | Rafael Campagnoli | 2021/7/27 | |
Capacitive sensor and method for sensing changes in a space | 2021/6/29 | ||
Fast Energy-Optimal Multikernel DNN-Like Application Allocation on Multi-FPGA Platforms | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | Junnan Shan Mihai T Lazarescu Jordi Cortadella Luciano Lavagno Mario R Casu | 2021/4/30 |
Capacitive Sensor Front-end Using Carrier Demodulation | Mihai LAZARESCU Luciano LAVAGNO | 2020/6/20 |
Co-Authors
