Luciano Lavagno
Politecnico di Torino
H-index: 55
Europe-Italy
Top articles of Luciano Lavagno
Title | Journal | Author(s) | Publication Date |
|---|---|---|---|
Mix & Latch: Comparison With State-of-the-Art Retiming On a RISC-V Benchmark | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | Lorenzo Lagostina Filippo Minnella Jordi Cortadella Mario R Casu Mihai T Lazarescu | 2024/1/31 |
Inter-kernel dataflow analysis and deadlock detection | 2023/2/2 | ||
Graph Neural Network for Event-based Vision | Daniele Busacca | 2023/12/15 | |
A Graph Neural Network Model for Fast and Accurate Quality of Result Estimation for High-Level Synthesis | IEEE Access | M Usman Jamal Zhuowei Li Mihai T Lazarescu Luciano Lavagno | 2023/8/9 |
CUDA-Optimized GPU Acceleration of 3GPP 3D Channel Model Simulations for 5G Network Planning | Electronics | Nasir Ali Shah Mihai T Lazarescu Roberto Quasso Luciano Lavagno | 2023/7/25 |
A Survey on Design Methodologies for Accelerating Deep Learning on Heterogeneous Architectures | arXiv preprint arXiv:2311.17815 | Fabrizio Ferrandi Serena Curzel Leandro Fiorin Daniele Ielmini Cristina Silvano | 2023/11/29 |
A survey on deep learning hardware accelerators for heterogeneous hpc platforms | arXiv preprint arXiv:2306.15552 | Cristina Silvano Daniele Ielmini Fabrizio Ferrandi Leandro Fiorin Serena Curzel | 2023/6/27 |
A DSP shared is a DSP earned: HLS Task-Level Multi-Pumping for High-Performance Low-Resource Designs | Giovanni Brignone Mihai T Lazarescu Luciano Lavagno | 2023/11/6 | |
To spike or not to spike: A digital hardware perspective on deep learning acceleration | IEEE Journal on Emerging and Selected Topics in Circuits and Systems | Fabrizio Ottati Chang Gao Qinyu Chen Giovanni Brignone Mario R Casu | 2023/11/6 |
Enhanced Exploration of Neural Network Models for Indoor Human Monitoring | Giorgia Subbicini Luciano Lavagno Mihai T Lazarescu | 2023/6/8 | |
Mix & Latch: An Optimization Flow for High-Performance Designs with Single-Clock Mixed-Polarity Latches and Flip-Flops | IEEE access | Filippo Minnella Jordi Cortadella Mario R Casu Mihai T Lazarescu Luciano Lavagno | 2023/4/10 |
Exploring the Razor Approach for Better Than Worst-Case Design in Latency-Insensitive Digital Circuits | Marco Massetti | 2023/12/15 | |
Design and Optimization of Residual Neural Network Accelerators for Low-Power FPGAs Using High-Level Synthesis | arXiv preprint arXiv:2309.15631 | Filippo Minnella Teodoro Urso Mihai T Lazarescu Luciano Lavagno | 2023/9/27 |
Robustness and reliability of a 1D-ConvNet in trajectory prediction with data augmentation from capacitive sensors | Ivan Airola Sciot | 2022/4/13 | |
Subgraph isomorphism acceleration on FPGAs using High-Level Synthesis | Roberto Bosio | 2022/12/20 | |
Research on Tagless indoor person localization system | Runxin Du | 2022/4/13 | |
Application-specific hardware pipeline implemented in an integrated circuit | 2022/12/6 | ||
FPGA Acceleration of 3GPP Channel Model Emulator for 5G New Radio | IEEE Access | Nasir Ali Shah Mihai T Lazarescu Roberto Quasso Salvatore Scarpina Luciano Lavagno | 2022/11/9 |
Array-specific dataflow caches for high-level synthesis of memory-intensive algorithms on FPGAs | IEEE Access | Giovanni Brignone M Usman Jamal Mihai T Lazarescu Luciano Lavagno | 2022/11/4 |
Drift Rejection Differential Frontend for Single Plate Capacitive Sensors | IEEE Sensors Journal | Giorgia Subbicini Luciano Lavagno Mihai T Lazarescu | 2022/7/13 |
