George Constantinides

George Constantinides

Imperial College London

H-index: 44

Europe-United Kingdom

About George Constantinides

George Constantinides, With an exceptional h-index of 44 and a recent h-index of 24 (since 2020), a distinguished researcher at Imperial College London, specializes in the field of High-Level Synthesis, Reconfigurable, Computer Arithmetic.

His recent articles reflect a diverse array of research interests and contributions to the field:

Combining Power and Arithmetic Optimization via Datapath Rewriting

Constructing hierarchical clock gating architectures via rewriting

Hardware power optimization via e-graph based automatic rtl exploration

A Statically and Dynamically Scalable Soft GPGPU

NeuraLUT: Hiding Neural Network Density in Boolean Synthesizable Functions

Automated detection of case-splitting opportunities in rtl

LQER: Low-Rank Quantization Error Reconstruction for LLMs

ATHEENA: A Toolflow for Hardware Early-Exit Network Automation

George Constantinides Information

University

Position

___

Citations(all)

7735

Citations(since 2020)

2553

Cited By

6212

hIndex(all)

44

hIndex(since 2020)

24

i10Index(all)

169

i10Index(since 2020)

65

Email

University Profile Page

Imperial College London

Google Scholar

View Google Scholar Profile

George Constantinides Skills & Research Interests

High-Level Synthesis

Reconfigurable

Computer Arithmetic

Top articles of George Constantinides

Title

Journal

Author(s)

Publication Date

Combining Power and Arithmetic Optimization via Datapath Rewriting

arXiv preprint arXiv:2404.12336

Samuel Coward

Theo Drane

Emiliano Morini

George Constantinides

2024/4/18

Constructing hierarchical clock gating architectures via rewriting

2024/4/4

Hardware power optimization via e-graph based automatic rtl exploration

2024/4/4

A Statically and Dynamically Scalable Soft GPGPU

Martin Langhammer

George A Constantinides

2024/4/1

NeuraLUT: Hiding Neural Network Density in Boolean Synthesizable Functions

arXiv preprint arXiv:2403.00849

Marta Andronic

George A Constantinides

2024/2/29

Automated detection of case-splitting opportunities in rtl

2024/4/18

LQER: Low-Rank Quantization Error Reconstruction for LLMs

arXiv preprint arXiv:2402.02446

Cheng Zhang

Jianyi Cheng

George A Constantinides

Yiren Zhao

2024/2/4

ATHEENA: A Toolflow for Hardware Early-Exit Network Automation

Benjamin Biggs

Christos-Savvas Bouganis

George Constantinides

2023/5/8

Automating constraint-aware datapath optimization using e-graphs

Samuel Coward

George A Constantinides

Theo Drane

2023/7/9

Revisiting block-based quantisation: What is important for sub-8-bit LLM inference?

arXiv preprint arXiv:2310.05079

Cheng Zhang

Jianyi Cheng

Ilia Shumailov

George A Constantinides

Yiren Zhao

2023/10/8

PolyLUT: learning piecewise polynomials for ultra-low latency FPGA LUT-based inference

Marta Andronic

George A Constantinides

2023/12/12

A Parametrizable Template for Approximate Logic Synthesis

Morteza Rezaalipour

Marco Biasion

Ilaria Scarabottolo

George A Constantinides

Laura Pozzi

2023/6/27

eGPU: A 750 MHz Class Soft GPGPU for FPGA

Martin Langhammer

George A Constantinides

2023/9/4

FPGA Resource-aware Structured Pruning for Real-Time Neural Networks

Benjamin Ramhorst

Vladimir Lončar

George A Constantinides

2023/12/12

Multi-Metric SMT-Based Evaluation of Worst-Case-Error for Approximate Circuits

Morteza Rezaalipour

Lorenzo Ferretti

Ilaria Scarabottolo

George A Constantinides

Laura Pozzi

2023/6/27

Parallelising Control Flow in Dynamic-scheduling High-level Synthesis

ACM Transactions on Reconfigurable Technology and Systems

Jianyi Cheng

Lana Josipović

John Wickerson

George A Constantinides

2023

Multiplier Optimization via E-Graph Rewriting

arXiv preprint arXiv:2312.06004

Andy Wanna

Samuel Coward

Theo Drane

George A Constantinides

Miloš D Ercegovac

2023/12/10

Combining e-graphs with abstract interpretation

Samuel Coward

George A Constantinides

Theo Drane

2023/6/6

Logic Shrinkage: Learned Connectivity Sparsification for LUT-Based Neural Networks

ACM Transactions on Reconfigurable Technology and Systems

Erwei Wang

Marie Auffret

Georgios-Ilias Stavrou

Peter YK Cheung

George A Constantinides

...

2023/9/1

Enabling Binary Neural Network Training on the Edge

ACM Transactions on Embedded Computing Systems

Erwei Wang

James J Davis

Daniele Moro

Piotr Zielinski

Jia Jie Lim

...

2023/11/9

See List of Professors in George Constantinides University(Imperial College London)

Co-Authors

H-index: 72
Wayne Luk

Wayne Luk

Imperial College London

H-index: 51
Peter Y K Cheung

Peter Y K Cheung

Imperial College London

H-index: 44
Eric C. Kerrigan

Eric C. Kerrigan

Imperial College London

H-index: 30
Christos Bouganis

Christos Bouganis

Imperial College London

H-index: 25
Stefano Longo

Stefano Longo

Cranfield University

H-index: 18
John Wickerson

John Wickerson

Imperial College London

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