David Bol

About David Bol

David Bol, With an exceptional h-index of 30 and a recent h-index of 23 (since 2020), a distinguished researcher at Université Catholique de Louvain, specializes in the field of Sustainability, CMOS integrated circuits, Low-power design, Smart sensors, Internet-of-Things.

His recent articles reflect a diverse array of research interests and contributions to the field:

Cross-Domain Optimization of Low-Power Mixed-Signal Sensor Systems Under Classification Accuracy Constraints

A Cradle-to-Gate Life Cycle Analysis of Bitcoin Mining Equipment Using Sphera LCA and ecoinvent Databases

Variability and Intrinsic Noise Effects in ULV CMOS SRAM Demystified

Evaluating the (ir) relevance of IoT solutions with respect to environmental limits based on LCA and backcasting studies

Post-Silicon Optimization of a Highly Programmable 64-MHz PLL Achieving 2.7-5.7 μW

A Configurable RAN Model to Evaluate and Reduce its Power Consumption and Carbon Footprint

Bottom-up and top-down approaches for the design of neuromorphic processing systems: tradeoffs and synergies between natural and artificial intelligence

Technical and Ecological Limits of 2.45-GHz Wireless Power Transfer for Battery-Less Sensors

David Bol Information

University

Position

ECS group ICTEAM institute

Citations(all)

3249

Citations(since 2020)

1910

Cited By

1946

hIndex(all)

30

hIndex(since 2020)

23

i10Index(all)

70

i10Index(since 2020)

42

Email

University Profile Page

Google Scholar

David Bol Skills & Research Interests

Sustainability

CMOS integrated circuits

Low-power design

Smart sensors

Internet-of-Things

Top articles of David Bol

Title

Journal

Author(s)

Publication Date

Cross-Domain Optimization of Low-Power Mixed-Signal Sensor Systems Under Classification Accuracy Constraints

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Rémi Dekimpe

David Bol

2024/3/4

A Cradle-to-Gate Life Cycle Analysis of Bitcoin Mining Equipment Using Sphera LCA and ecoinvent Databases

arXiv preprint arXiv:2401.17512

Ludmila Courtillat--Piazza

Thibault Pirson

Louis Golard

David Bol

2024/1/31

Variability and Intrinsic Noise Effects in ULV CMOS SRAM Demystified

Léopold Van Brandt

Fernando Silveira

Jean-Charles Delvenne

David Bol

Denis Flandre

2023

Evaluating the (ir) relevance of IoT solutions with respect to environmental limits based on LCA and backcasting studies

LIMITS’23: Workshop on Computing within Limits

Thibault Pirson

Louis Golard

David Bol

2023/6/14

Post-Silicon Optimization of a Highly Programmable 64-MHz PLL Achieving 2.7-5.7 μW

Marco Gonzalez

David Bol

2023/4/17

A Configurable RAN Model to Evaluate and Reduce its Power Consumption and Carbon Footprint

Pre-Proceedings of the 2023 Symposium on Information Theory and Signal Processing in the Benelux

Louis Golard

David Bol

Jérôme Louveaux

2023

Bottom-up and top-down approaches for the design of neuromorphic processing systems: tradeoffs and synergies between natural and artificial intelligence

Charlotte Frenkel

David Bol

Giacomo Indiveri

2023/6/5

Technical and Ecological Limits of 2.45-GHz Wireless Power Transfer for Battery-Less Sensors

IEEE Internet of Things Journal

Marco Gonzalez

Pengcheng Xu

Rémi Dekimpe

Maxime Schramme

Ivan Stupia

...

2023/4/3

UFBBR: A Unified Frequency and Back-Bias Regulation Unit for Ultralow-Power Microcontrollers in 28-nm FDSOI

IEEE Transactions on Circuits and Systems I: Regular Papers

Maxime Schramme

David Bol

2023/3/21

Evaluation and projection of 4G and 5G RAN energy footprints: The case of Belgium for 2020–2025

Annals of Telecommunications

Louis Golard

Jérôme Louveaux

David Bol

2023/6

Modélisation du cout énergétique et écologique d’objets connectés et de processus de digitalisation

Thibault Pirson

David Bol

2023/12

A 1.1-/ 0.9-nA Temperature-Independent 213-/ 565-ppm/C Self-Biased CMOS-Only Current Reference in 65-nm Bulk and 22-nm FDSOI

IEEE Journal of Solid-State Circuits

Martin Lefebvre

Denis Flandre

David Bol

2023/2/8

IMPACT: A 1-to-4b 813-TOPS/W 22-nm FD-SOI Compute-in-Memory CNN Accelerator Featuring a 4.2-POPS/W 146-TOPS/mm CIM-SRAM With Multi-Bit Analog …

IEEE Journal of Solid-State Circuits

Adrian Kneip

Martin Lefebvre

Julien Verecken

David Bol

2023/5/19

Energy harvesting system

2015/4/14

A 7T-NDR dual-supply 28-nm FD-SOI ultra-low power SRAM with 0.23-nW/kB sleep retention and 0.8 pJ/32b access at 64 MHz with forward back bias

IEEE Transactions on Circuits and Systems I: Regular Papers

Adrian Kneip

David Bol

2023/1/2

A sub-mW Cortex-M4 Microcontroller Design for IoT Software-Defined Radios

IEEE Open Journal of Circuits and Systems

Mathieu Xhonneux

Jérôme Louveaux

David Bol

2023/4/26

Accurate and insightful closed-form prediction of subthreshold SRAM hold failure rate

IEEE Transactions on Circuits and Systems I: Regular Papers

Léopold Van Brandt

Roghayeh Saeidi

David Bol

Denis Flandre

2022/4/8

A 1-to-4b 16.8-POPS/W 473-TOPS/mm2 6T-based In-Memory Computing SRAM in 22nm FD-SOI with Multi-Bit Analog Batch-Normalization

Adrian Kneip

Martin Lefebvre

Julien Verecken

David Bol

2022/9/19

Systemic Approach to the Environmental Sustainability of Mobile Health

Rémi Dekimpe

Thibault Pirson

David Bol

2022/10

Comprehensive analytical comparison of ring oscillators in FDSOI technology: Current starving versus back-bias control

IEEE Transactions on Circuits and Systems I: Regular Papers

Maxime Schramme

Léopold Van Brandt

Denis Flandre

David Bol

2022/2/1

See List of Professors in David Bol University(Université Catholique de Louvain)

Co-Authors

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