Ananda Samajdar

Georgia Institute of Technology

H-index: 11

North America-United States

About Ananda Samajdar

Ananda Samajdar, With an exceptional h-index of 11 and a recent h-index of 11 (since 2020), a distinguished researcher at Georgia Institute of Technology, specializes in the field of Computer Architecture, Machine Learning, VLSI design, Embedded Systems, Artificial Intelligence.

His recent articles reflect a diverse array of research interests and contributions to the field:

Self adaptive reconfigurable arrays (SARA) learning flexible GEMM accelerator configuration and mapping-space using ML

Architecture, dataflow and physical design implications of 3D-ICs for DNN-accelerators

Self-Adaptive Reconfigurable Arrays (SARA): Using ML to Assist Scaling GEMM Acceleration

RASA: Efficient Register-Aware Systolic Array Matrix Engine for CPU

METHODOLOGY AND ANALYSIS FOR EFFICIENT CUSTOM ARCHITECTURE DESIGN USING MACHINE LEARNING

AIRCHITECT: Learning custom architecture design and mapping space

Introduction to Data Orchestration

SIGMA: A Sparse and Irregular GEMM Accelerator with Flexible Interconnects for DNN Training

Ananda Samajdar Information

University	Georgia Institute of Technology
Position	___
Citations(all)	1572
Citations(since 2020)	1537
Cited By	465
hIndex(all)	11
hIndex(since 2020)	11
i10Index(all)	12
i10Index(since 2020)	12
Email	Access Email
University Profile Page	Georgia Institute of Technology
Google Scholar	View Google Scholar Profile

Ananda Samajdar Skills & Research Interests

Computer Architecture

Machine Learning

VLSI design

Embedded Systems

Artificial Intelligence

Top articles of Ananda Samajdar

Title	Journal	Author(s)	Publication Date
Self adaptive reconfigurable arrays (SARA) learning flexible GEMM accelerator configuration and mapping-space using ML		Ananda Samajdar Eric Qin Michael Pellauer Tushar Krishna	2022/7/10
Architecture, dataflow and physical design implications of 3D-ICs for DNN-accelerators		Jan Moritz Joseph Ananda Samajdar Lingjun Zhu Rainer Leupers Sung Kyu Lim ...	2021/4/7
Self-Adaptive Reconfigurable Arrays (SARA): Using ML to Assist Scaling GEMM Acceleration	arXiv preprint arXiv:2101.04799	Ananda Samajdar Michael Pellauer Tushar Krishna	2021/1/12
RASA: Efficient Register-Aware Systolic Array Matrix Engine for CPU		Geonhwa Jeong Eric Qin Ananda Samajdar Christopher J Hughes Sreenivas Subramoney ...	2021/12/5
METHODOLOGY AND ANALYSIS FOR EFFICIENT CUSTOM ARCHITECTURE DESIGN USING MACHINE LEARNING		Ananda Samajdar	2021/12/13
AIRCHITECT: Learning custom architecture design and mapping space	arXiv preprint arXiv:2108.08295	Ananda Samajdar Jan Moritz Joseph Matthew Denton Tushar Krishna	2021/8/16
Introduction to Data Orchestration		Tushar Krishna Hyoukjun Kwon Angshuman Parashar Michael Pellauer Ananda Samajdar	2020
SIGMA: A Sparse and Irregular GEMM Accelerator with Flexible Interconnects for DNN Training		Eric Qin Ananda Samajdar Hyoukjun Kwon Vineet Nadella Sudarshan Srinivasan ...	2020/2
Buffer Hierarchies		Tushar Krishna Hyoukjun Kwon Angshuman Parashar Michael Pellauer Ananda Samajdar	2020
Modeling Accelerator Design Space		Tushar Krishna Hyoukjun Kwon Angshuman Parashar Michael Pellauer Ananda Samajdar	2020
A Systematic Methodology for Characterizing Scalability of DNN Accelerators using SCALE-Sim		Ananda Samajdar Jan Moritz Joseph Yuhao Zhu Paul Whatmough Matthew Mattina ...	2020
Putting it Together: Architecting a DNN Accelerator		Tushar Krishna Hyoukjun Kwon Angshuman Parashar Michael Pellauer Ananda Samajdar	2020
Dataflow and Data Reuse		Tushar Krishna Hyoukjun Kwon Angshuman Parashar Michael Pellauer Ananda Samajdar	2020
Clan: Continuous learning using asynchronous neuroevolution on commodity edge devices		Parth Mannan Ananda Samajdar Tushar Krishna	2020/8/23
Orchestrating Compressed-Sparse Data		Tushar Krishna Hyoukjun Kwon Angshuman Parashar Michael Pellauer Ananda Samajdar	2020
Data orchestration in deep learning accelerators		Tushar Krishna Hyoukjun Kwon Angshuman Parashar Michael Pellauer Ananda Samajdar	2020/8/18