Sudhakar Pamarti

Sudhakar Pamarti

University of California, Los Angeles

H-index: 29

North America-United States

About Sudhakar Pamarti

Sudhakar Pamarti, With an exceptional h-index of 29 and a recent h-index of 19 (since 2020), a distinguished researcher at University of California, Los Angeles, specializes in the field of Integrated circuit design.

His recent articles reflect a diverse array of research interests and contributions to the field:

Neural network system with neurons including charge-trap transistors and neural integrators and methods therefor

Digital Residual Alias Cancellation for Filtering-by-Aliasing Receivers

Alanine aminotransferase assay biosensor platform using silicon nanowire field effect transistors

Analytical Array-Level Comparison of Read/Write Performance Between Voltage Controlled-MRAM and STT-MRAM

A Low Power 100 GHz Static CML Frequency Divider in 0.18 μm SiGe BiCMOS Technology

A Spur-free Dynamic Element Matching Scheme for Bandpass DACs

Low-Energy Shared-Current Write Schemes for Voltage-Controlled Spin-Orbit-Torque Memory

REX-SC: Range-Extended Stochastic Computing Accumulation for Neural Network Acceleration

Sudhakar Pamarti Information

University

Position

Professor of Electrical and Computer Engineering

Citations(all)

2869

Citations(since 2020)

1094

Cited By

2236

hIndex(all)

29

hIndex(since 2020)

19

i10Index(all)

68

i10Index(since 2020)

34

Email

University Profile Page

University of California, Los Angeles

Google Scholar

View Google Scholar Profile

Sudhakar Pamarti Skills & Research Interests

Integrated circuit design

Top articles of Sudhakar Pamarti

Title

Journal

Author(s)

Publication Date

Neural network system with neurons including charge-trap transistors and neural integrators and methods therefor

2024/1/25

Digital Residual Alias Cancellation for Filtering-by-Aliasing Receivers

IEEE Transactions on Circuits and Systems I: Regular Papers

Shi Bu

Vinod Kurian Jacob

Sudhakar Pamarti

2024/1/1

Alanine aminotransferase assay biosensor platform using silicon nanowire field effect transistors

Communications Engineering

Katherine A Muratore

Dan Zhou

Jiangang J Du

John S Chlystek

Kasra Motesadi

...

2023/3/1

Analytical Array-Level Comparison of Read/Write Performance Between Voltage Controlled-MRAM and STT-MRAM

Haris Suhail

Jiyue Yang

Haoran He

Kang L Wang

Sudhakar Pamarti

2023/8/6

A Low Power 100 GHz Static CML Frequency Divider in 0.18 μm SiGe BiCMOS Technology

Hao-Yu Chien

Christopher Chen

Jason Woo

Sudhakar Pamarti

Chih-Kong Ken Yang

...

2023/1/22

A Spur-free Dynamic Element Matching Scheme for Bandpass DACs

Jarrah Bergeron

Sudhakar Pamarti

2023/6/26

Low-Energy Shared-Current Write Schemes for Voltage-Controlled Spin-Orbit-Torque Memory

IEEE Transactions on Electron Devices

Albert Lee

Irina Alam

Jiyue Yang

Di Wu

Sudhakar Pamarti

...

2023/1/6

REX-SC: Range-Extended Stochastic Computing Accumulation for Neural Network Acceleration

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Tianmu Li

Wojciech Romaszkan

Sudhakar Pamarti

Puneet Gupta

2023/6/8

Fast startup of crystal and other high-Q oscillators

2023/4/4

The First CMOS-Integrated Voltage-Controlled MRAM with 0.7 ns Switching Time

H Suhail

H He

J Yang

Q Shu

C-Y Wang

...

2023/12/9

A Nonvolatile Compute-In-Memory Macro Using Voltage-Controlled MRAM and In-Situ Magnetic-to-Digital Converter

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits

Vinod Kurian Jacob

Jiyue Yang

Haoran He

Puneet Gupta

Kang L Wang

...

2023/3/17

FPGA Crystal Oscillator Circuit Emulation Based on Wave Digital Filter

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Abdulaziz Alshaya

Sudhakar Pamarti

Christos Papavassiliou

2023/11/17

A 65nm 8-bit all-digital stochastic-compute-in-memory deep learning processor

Jiyue Yang

Tianmu Li

Wojciech Romaszkan

Puneet Gupta

Sudhakar Pamarti

2022/11/6

A 4.4–75-TOPS/W 14-nm Programmable, Performance-and Precision-Tunable All-Digital Stochastic Computing Neural Network Inference Accelerator

IEEE Solid-State Circuits Letters

Wojciech Romaszkan

Tianmu Li

Rahul Garg

Jiyue Yang

Sudhakar Pamarti

...

2022/8/19

A 14-bit 1-GS/s SiGe Bootstrap Sampler for High Resolution ADC with 250-MHz Input

Jiazhang Song

Li-Yang Chen

Mau-Chung Frank Chang

Sudhakar Pamarti

Chih-Kong Ken Yang

2022/5/27

A Digital Alias Cancellation Technique for Filtering-by-Aliasing Receivers

Shi Bu

Vinod Kurian Jacob

Sudhakar Pamarti

2022/5/27

Adaptive programmable modulation techniques for miniaturized measurement devices

2022/12/15

Demonstration of Analog Compute-In-Memory Using the Charge-Trap Transistor in 22 FDX Technology

S Qiao

S Moran

D Srinivas

S Pamarti

SS Iyer

2022/12/3

Ultra-low-power oscillator with DC-only sustaining amplifier

2021/2/16

A calibration-free in-memory true random number generator using voltage-controlled MRAM

Jiyue Yang

Di Wu

Albert Lee

Seyed Armin Razavi

Puneet Gupta

...

2021/9/13

See List of Professors in Sudhakar Pamarti University(University of California, Los Angeles)