SeongHwan Cho

SeongHwan Cho

KAIST

H-index: 38

Asia-South Korea

About SeongHwan Cho

SeongHwan Cho, With an exceptional h-index of 38 and a recent h-index of 22 (since 2020), a distinguished researcher at KAIST, specializes in the field of Analog & mixed signal circuits, sensors.

His recent articles reflect a diverse array of research interests and contributions to the field:

Semiconductor device including a memory array performing a multiplication and accumulation (MAC) operation using capacitors

Semiconductor memory device performing a multiplication and accumulation operation

Band-pass analog-to-digital converter using bidirectional voltage-controlled oscillator

Frequency modulation system based on phase-locked loop capable of performing fast modulation independent of bandwidth and method of the same

A Jitter-Programmable Bang-Bang Phase-Locked Loop Using PVT Invariant Stochastic Jitter Monitor

MAC operating device and method for processing machine learning algorithm

A 44.2-TOPS/W CNN Processor With Variation-Tolerant Analog Datapath and Variation Compensating Circuit

Introduction to the Special Section on the 2022 Asian Solid-State Circuits Conference (A-SSCC)

SeongHwan Cho Information

University

Position

___

Citations(all)

8102

Citations(since 2020)

1601

Cited By

7005

hIndex(all)

38

hIndex(since 2020)

22

i10Index(all)

88

i10Index(since 2020)

47

Email

University Profile Page

Google Scholar

SeongHwan Cho Skills & Research Interests

Analog & mixed signal circuits

sensors

Top articles of SeongHwan Cho

Title

Journal

Author(s)

Publication Date

Semiconductor device including a memory array performing a multiplication and accumulation (MAC) operation using capacitors

2024/1/23

Semiconductor memory device performing a multiplication and accumulation operation

2024/1/11

Band-pass analog-to-digital converter using bidirectional voltage-controlled oscillator

2023/12/5

Frequency modulation system based on phase-locked loop capable of performing fast modulation independent of bandwidth and method of the same

2023/4/18

A Jitter-Programmable Bang-Bang Phase-Locked Loop Using PVT Invariant Stochastic Jitter Monitor

Yong-Jo Kim

Taekwang Jang

SeongHwan Cho

2023/11/5

MAC operating device and method for processing machine learning algorithm

2023/10/31

A 44.2-TOPS/W CNN Processor With Variation-Tolerant Analog Datapath and Variation Compensating Circuit

IEEE Journal of Solid-State Circuits

Jin-O Seo

Mingoo Seok

SeongHwan Cho

2023/10/30

Introduction to the Special Section on the 2022 Asian Solid-State Circuits Conference (A-SSCC)

IEEE Journal of Solid-State Circuits

Seonghwan Cho

Joo-Young Kim

Minoru Fujishima

Jun Zhou

2023/9/25

An Adaptive Filter Based Motion Artifact Cancellation Technique Using Multi-Wavelength PPG for Accurate HR Estimation

IEEE Transactions on Biomedical Circuits and Systems

Pangi Park

Woobean Lee

SeongHwan Cho

2023/9/14

Adaptive Clocking Using Supply Tracking Clock Modulator With Background-Calibrated Supply Sensitivity

IEEE Solid-State Circuits Letters

Dongin Kim

SeongHwan Cho

2022/3/31

A Low-power Sleep Apnea Monitoring IC with a Duty-Recovered Body Channel Communication Receiver

Pangi Park

Donghyeok Cho

SeongHwan Cho

2022/11/6

A supply-noise-induced jitter-cancelling clock distribution network for LPDDR5 mobile DRAM featuring a 2nd-order adaptive filter

Yeonwook Jung

Seongseop Lee

Hyojun Kim

SeongHwan Cho

2022/2/20

A Supply-Noise-Induced Jitter Canceling Adaptive Filter for LPDDR5 Mobile DRAM

IEEE Journal of Solid-State Circuits

Yeonwook Jung

Seongseop Lee

Hyojun Kim

Seonghwan Cho

2022/9/27

Nonvolatile memory device performing a multiplication and accumulation operation

2022/12/13

ARCHON: A 332.7 TOPS/W 5b variation-tolerant analog CNN processor featuring analog neuronal computation unit and analog memory

Jin-O Seo

Mingoo Seok

SeongHwan Cho

2022/2/20

Nonvolatile memory device performing a multiplicaiton and accumulation operation

2022/7/26

An output-capacitorless analog LDO featuring frequency compensation of four-stage amplifier

IEEE Transactions on Circuits and Systems I: Regular Papers

Myungjun Kim

SeongHwan Cho

2022/11/28

A 43 nW, 32 kHz,±4.2 ppm Piecewise Linear Temperature-Compensated Crystal Oscillator With ΔΣ-Modulated Load Capacitance

IEEE Journal of Solid-State Circuits

Sujin Park

Ji-Hwan Seol

Li Xu

Seonghwan Cho

Dennis Sylvester

...

2022/1/19

A 43.3-μW Biopotential Amplifier With Tolerance to Common-Mode Interference of 18 Vpp and T-CMRR of 105 dB in 180-nm CMOS

IEEE Journal of Solid-State Circuits

Nahmil Koo

Hyojun Kim

Seonghwan Cho

2022/7/7

A 3.68 aF Resolution Continuous-Time Bandpass Capacitance-to-Digital Converter for Full-CMOS Sensors in 0.18 m CMOS

IEEE Journal of Solid-State Circuits

Sujin Park

Hyungil Chae

Seonghwan Cho

2022/11/23

See List of Professors in SeongHwan Cho University(KAIST)