Rolf Drechsler

Rolf Drechsler

Universität Bremen

H-index: 67

Europe-Germany

About Rolf Drechsler

Rolf Drechsler, With an exceptional h-index of 67 and a recent h-index of 37 (since 2020), a distinguished researcher at Universität Bremen, specializes in the field of algorithms, data structures, system design, verification, test.

His recent articles reflect a diverse array of research interests and contributions to the field:

Security Coverage Metrics for Information Flow at the System Level

cecApprox: Enabling Automated Combinational Equivalence Checking for Approximate Circuits

Complete and Efficient Verification for a RISC-V Processor using Formal Verification

Eingebettete Kompressionsarchitektur für Testzugang

Experimental Validation of Memristor-Aided Logic Using 1T1R TaOx RRAM Crossbar Array

MemSPICE: Automated simulation and energy estimation framework for magic-based logic-in-memory

BinSym: Binary-Level Symbolic Execution using Formal Descriptions of Instruction Semantics

Eingebettete Mehrkanal-Testkompression für Tests mit niedriger Pin-Anzahl

Rolf Drechsler Information

University

Position

Professor at Director DFKI Bremen Germany

Citations(all)

21330

Citations(since 2020)

7659

Cited By

16946

hIndex(all)

67

hIndex(since 2020)

37

i10Index(all)

498

i10Index(since 2020)

231

Email

University Profile Page

Universität Bremen

Google Scholar

View Google Scholar Profile

Rolf Drechsler Skills & Research Interests

algorithms

data structures

system design

verification

test

Top articles of Rolf Drechsler

Title

Journal

Author(s)

Publication Date

Security Coverage Metrics for Information Flow at the System Level

Ece Nur Demirhan Coşkun

Sallar Ahmadi-Pour

Muhammad Hassan

Rolf Drechsler

2024/1/22

cecApprox: Enabling Automated Combinational Equivalence Checking for Approximate Circuits

IEEE Transactions on Circuits and Systems I: Regular Papers

Chandan Kumar Jha

Muhammad Hassan

Rolf Drechsler

2024/4/22

Complete and Efficient Verification for a RISC-V Processor using Formal Verification

Lennart Weingarten

Kamalika Datta

Abhoy Kole

Rolf Drechsler

2024

Eingebettete Kompressionsarchitektur für Testzugang

Sebastian Huhn

Rolf Drechsler

2024/1/3

Experimental Validation of Memristor-Aided Logic Using 1T1R TaOx RRAM Crossbar Array

Ankit Bende

Simranjeet Singh

Chandan Kumar Jha

Tim Kempen

Felix Cüppers

...

2024/1/6

MemSPICE: Automated simulation and energy estimation framework for magic-based logic-in-memory

Simranjeet Singh

Chandan Kumar Jha

Ankit Bende

Vikas Rana

Sachin Patkar

...

2024/1/22

BinSym: Binary-Level Symbolic Execution using Formal Descriptions of Instruction Semantics

arXiv preprint arXiv:2404.04132

Sören Tempel

Tobias Brandt

Christoph Lüth

Rolf Drechsler

2024/4/5

Eingebettete Mehrkanal-Testkompression für Tests mit niedriger Pin-Anzahl

Sebastian Huhn

Rolf Drechsler

2024/1/3

Optimierung SAT-basiertes Retargeting für eingebettete Kompression

Sebastian Huhn

Rolf Drechsler

2024/1/3

Trends and challenges in design of embedded BCH error correction codes in multi-levels NAND flash memory devices

Saeideh Nabipour

Javad Javidan

Rolf Drechsler

2024/1/19

Improving Virtual Prototype Driven Hardware Optimization by Merging Instruction Sequences

Jan Zielasko

Rune Krauss

Marcel Merten

Rolf Drechsler

2024/4/3

Formale Techniken

Sebastian Huhn

Rolf Drechsler

2024/1/3

Schlussfolgerung und Ausblick

Sebastian Huhn

Rolf Drechsler

2024/1/3

A Dynamic Programming Based Graph Traversal Approach for Efficient Implementation of Nearest Neighbor Architecture in 2D

Sneha Lahiri

Megha Kesh

Rupsa Mandal

Anirban Bhattacharjee

Sovan Bhattacharya

...

2024/1/6

Hardware and Environment Modeling

Pascal Pieper

Rolf Drechsler

2024/3/26

Rekonfigurierbare TAP-Controller mit eingebetteter Kompression

Sebastian Huhn

Rolf Drechsler

2024/1/3

Integrierte Schaltkreise

Sebastian Huhn

Rolf Drechsler

2024/1/3

In-Memory SAT-Solver for Self-Verification of Programmable Memristive Architectures

Fatemeh Shirinzadeh

Arighna Deb

Saeideh Shirinzadeh

Abhoy Kole

Kamalika Datta

...

2024/1/6

Verification

Ido Tavory

2014

Efficient Equivalence Checking of Nonlinear Analog Circuits using Gradient Ascent

Kemal Çağlar Coşkun

Muhammad Hassan

Lars Hedrich

Rolf Drechsler

2024

See List of Professors in Rolf Drechsler University(Universität Bremen)