Naresh Shanbhag

About Naresh Shanbhag

Naresh Shanbhag, With an exceptional h-index of 56 and a recent h-index of 29 (since 2020), a distinguished researcher at University of Illinois at Urbana-Champaign, specializes in the field of circuits, signal processing, communications, machine learning.

His recent articles reflect a diverse array of research interests and contributions to the field:

Enhancing the Accuracy of 6T SRAM-based In-Memory Architecture via Maximum Likelihood Detection

Energy-Accuracy Trade-offs for Resistive In-Memory Computing Architectures

Boosting the Accuracy of SRAM-Based in-Memory Architectures Via Maximum Likelihood-Based Error Compensation Method

Prive: Efficient rram programming with chip verification for rram-based in-memory computing acceleration

Compute SNR-boosted 22 nm MRAM-based In-memory Computing Macro using Statistical Error Compensation

On the robustness of randomized ensembles to adversarial perturbations

Enhancing the Accuracy of Resistive In-Memory Architectures using Adaptive Signal Processing

Fundamental limits on the computational accuracy of resistive crossbar-based in-memory architectures

Naresh Shanbhag Information

University

Position

Professor of Electrical and Computer Engineering

Citations(all)

12872

Citations(since 2020)

3641

Cited By

10711

hIndex(all)

56

hIndex(since 2020)

29

i10Index(all)

190

i10Index(since 2020)

79

Email

University Profile Page

Google Scholar

Naresh Shanbhag Skills & Research Interests

circuits

signal processing

communications

machine learning

Top articles of Naresh Shanbhag

Title

Journal

Author(s)

Publication Date

Enhancing the Accuracy of 6T SRAM-based In-Memory Architecture via Maximum Likelihood Detection

IEEE Transactions on Signal Processing

Hyungyo Kim

Naresh Shanbhag

2024/4/29

Energy-Accuracy Trade-offs for Resistive In-Memory Computing Architectures

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits

Saion K Roy

Naresh R Shanbhag

2024/3/25

Boosting the Accuracy of SRAM-Based in-Memory Architectures Via Maximum Likelihood-Based Error Compensation Method

Hyungyo Kim

Naresh Shanbhag

2023/6/4

Prive: Efficient rram programming with chip verification for rram-based in-memory computing acceleration

Wangxin He

Jian Meng

Sujan Kumar Gonugondla

Shimeng Yu

Naresh R Shanbhag

...

2023/4/17

Compute SNR-boosted 22 nm MRAM-based In-memory Computing Macro using Statistical Error Compensation

Saion K Roy

Han-Mo Ou

Mostafa G Ahmed

Peter Deaville

Bonan Zhang

...

2023/9/11

On the robustness of randomized ensembles to adversarial perturbations

Hassan Dbouk

Naresh Shanbhag

2023/7/3

Enhancing the Accuracy of Resistive In-Memory Architectures using Adaptive Signal Processing

Han-Mo Ou

Naresh R Shanbhag

2023/6/4

Fundamental limits on the computational accuracy of resistive crossbar-based in-memory architectures

Saion K Roy

Ameya Patil

Naresh R Shanbhag

2022/5/27

IMPQ: Reduced Complexity Neural Networks Via Granular Precision Assignment

Sujan Kumar Gonugondla

Naresh R Shanbhag

2022/5/23

Comprehending in-memory computing trends via proper benchmarking

Naresh R Shanbhag

Saion K Roy

2022/4/24

Benchmarking in-memory computing architectures

IEEE Open Journal of the Solid-State Circuits Society

Naresh R Shanbhag

Saion K Roy

2022/12/8

Coordinated Science Laboratory 70th Anniversary Symposium: The Future of Computing

arXiv preprint arXiv:2210.08974

Klara Nahrstedt

Naresh Shanbhag

Vikram Adve

Nancy Amato

Romit Roy Choudhury

...

2022/10/4

Adversarial vulnerability of randomized ensembles

Hassan Dbouk

Naresh Shanbhag

2022/6/28

Fundamental limits on energy-delay-accuracy of in-memory architectures in inference applications

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Sujan K Gonugondla

Charbel Sakr

Hassan Dbouk

Naresh R Shanbhag

2021/11/2

Optimizing Selective Protection for CNN Resilience.

Abdulrahman Mahmoud

Siva Kumar Sastry Hari

Christopher W Fletcher

Sarita V Adve

Charbel Sakr

...

2021/10/1

Robustifying Adversarial Training to the Union of Perturbation Models

arXiv preprint arXiv:2105.14710

Ameya D Patil

Michael Tuttle

Alexander G Schwing

Naresh R Shanbhag

2021/5/31

Generalized depthwise-separable convolutions for adversarially robust and efficient neural networks

Advances in Neural Information Processing Systems

Hassan Dbouk

Naresh Shanbhag

2021/12/6

SE1: What Technologies Will Shape the Future of Computing?

Hugh Mair

Shinichiro Shiratake

Eric Karl

Thomas Burd

Jonathan Chang

...

2021/2/13

Signal processing methods to enhance the energy efficiency of in-memory computing architectures

IEEE Transactions on Signal Processing

Charbel Sakr

Naresh R Shanbhag

2021/11/24

Future Prospects

Fabio Sartori Piran

Daniel Pacheco Lacerda

Luis Felipe Riehs Camargo

2020/1/8

See List of Professors in Naresh Shanbhag University(University of Illinois at Urbana-Champaign)