Martin D. F. Wong

Martin D. F. Wong

University of Illinois at Urbana-Champaign

H-index: 62

North America-United States

About Martin D. F. Wong

Martin D. F. Wong, With an exceptional h-index of 62 and a recent h-index of 20 (since 2020), a distinguished researcher at University of Illinois at Urbana-Champaign, specializes in the field of Design Automation, EDA/CAD, Algorithms, Optimization.

His recent articles reflect a diverse array of research interests and contributions to the field:

Ultra-fast source mask optimization via conditional discrete diffusion

CoPlace: Coherent Placement Engine with Layout-aware Partitioning for 3D ICs

AdaOPC 2.0: Enhanced Adaptive Mask Optimization Framework for Via Layers

Towards Automated RISC-V Microarchitecture Design with Reinforcement Learning

ISPD 2024 Lifetime Achievement Award Bio

Routing-aware Legal Hybrid Bonding Terminal Assignment for 3D Face-to-Face Stacked ICs

LithoBench: Benchmarking AI Computational Lithography for Semiconductor Manufacturing

Lay-Net: Grafting Netlist Knowledge on Layout-Based Congestion Prediction

Martin D. F. Wong Information

University

Position

Edward C. Jordan Professor of Electrical and Computer Engineering

Citations(all)

15804

Citations(since 2020)

2164

Cited By

14409

hIndex(all)

62

hIndex(since 2020)

20

i10Index(all)

293

i10Index(since 2020)

73

Email

University Profile Page

University of Illinois at Urbana-Champaign

Google Scholar

View Google Scholar Profile

Martin D. F. Wong Skills & Research Interests

Design Automation

EDA/CAD

Algorithms

Optimization

Top articles of Martin D. F. Wong

Title

Journal

Author(s)

Publication Date

Ultra-fast source mask optimization via conditional discrete diffusion

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Guojin Chen

Zixiao Wang

Bei Yu

David Z Pan

Martin DF Wong

2024/2/2

CoPlace: Coherent Placement Engine with Layout-aware Partitioning for 3D ICs

Bangqi Fu

Lixin Liu

Yang Sun

Wing-Ho Lau

Martin DF Wong

...

2024/1/22

AdaOPC 2.0: Enhanced Adaptive Mask Optimization Framework for Via Layers

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Wenqian Zhao

Xufeng Yao

Shuo Yin

Yang Bai

Ziyang Yu

...

2024/3/18

Towards Automated RISC-V Microarchitecture Design with Reinforcement Learning

Power

Chen Bai

Jianwang Zhai

Yuzhe Ma

Bei Yu

Martin DF Wong

2024/1/6

ISPD 2024 Lifetime Achievement Award Bio

Martin DF Wong

2024/3/12

Routing-aware Legal Hybrid Bonding Terminal Assignment for 3D Face-to-Face Stacked ICs

Siting Liu

Jiaxi Jiang

Zhuolun He

Ziyi Wang

Yibo Lin

...

2024/3/12

LithoBench: Benchmarking AI Computational Lithography for Semiconductor Manufacturing

Advances in Neural Information Processing Systems

Su Zheng

Haoyu Yang

Binwu Zhu

Bei Yu

Martin Wong

2024/2/13

Lay-Net: Grafting Netlist Knowledge on Layout-Based Congestion Prediction

Su Zheng

Lancheng Zou

Peng Xu

Siting Liu

Bei Yu

...

2023/10/28

CTM-SRAF: Continuous transmission mask-based constraint-aware sub resolution assist feature generation

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Ziyang Yu

Peiyu Liao

Yuzhe Ma

Bei Yu

Martin DF Wong

2023/1/25

SPARK: A Scalable Partitioning and Routing Framework for Multi-FPGA Systems

Xinshi Zang

Evangeline FY Young

Martin DF Wong

2023/6/5

DRC-SG 2.0: Efficient Design Rule Checking Script Generation via Key Information Extraction

ACM Transactions on Design Automation of Electronic Systems

Binwu Zhu

Xinyun Zhang

Yibo Lin

Bei Yu

Martin Wong

2023/9/8

Multi-Product Optimization for 3D Heterogeneous Integration with D2W Bonding

Zhen Zhuang

Kai-Yuan Chao

Bei Yu

Tsung-Yi Ho

Martin DF Wong

2023/10/28

CPP: A Multi-Level Circuit Partitioning Predictor for Hardware Verification Systems

Xinshi Zang

Lei Chen

Xing Li

Wilson WK Thong

Weihua Sheng

...

2023/6/5

Mitigating distribution shift for congestion optimization in global placement

Su Zheng

Lancheng Zou

Siting Liu

Yibo Lin

Bei Yu

...

2023/7/9

IT-DSE: Invariance Risk Minimized Transfer Microarchitecture Design Space Exploration

Ziyang Yu

Chen Bail

Shoubo Hu

Ran Chen

Taohai He

...

2023/10/28

A gpu-accelerated framework for path-based timing analysis

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Guannan Guo

Tsung-Wei Huang

Yibo Lin

Zizheng Guo

Sushma Yellapragada

...

2023/5/9

Concurrent Sign-off Timing Optimization via Deep Steiner Points Refinement

Siting Liu

Ziyi Wang

Fangzhou Liu

Yibo Lin

Bei Yu

...

2023/7/9

OpenILT: An open source inverse lithography technique framework

Su Zheng

Bei Yu

Martin Wong

2023/10/24

Xplace: An Extremely Fast and Extensible Placement Framework

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Lixin Liu

Bangqi Fu

Shiju Lin

Jinwei Liu

Evangeline FY Young

...

2023/12/25

Fast STA Graph Partitioning Framework for Multi-GPU Acceleration

Guannan Guo

Tsung-Wei Huang

Martin Wong

2023/4/17

See List of Professors in Martin D. F. Wong University(University of Illinois at Urbana-Champaign)