Joseph Zambreno
Iowa State University
H-index: 29
North America-United States
Top articles of Joseph Zambreno
Title | Journal | Author(s) | Publication Date |
---|---|---|---|
An FPGA implementation of SipHash | Benjamin Welte Joseph Zambreno | 2023/5/15 | |
Convolutional neural network for subharmonics detection in Hardware-In-the-Loop | Marina Yushkova Joseph Zambreno Alberto Sanchez Angel de Castro | 2023/12/21 | |
Efficient Unmanned Aerial Systems Navigation With Collision Avoidance in Dense Urban Environments | IEEE Transactions on Intelligent Transportation Systems | Josh Bertram Joseph Zambreno Peng Wei | 2023/7/17 |
A fast Markov decision process-based algorithm for collision avoidance in urban air mobility | IEEE transactions on intelligent transportation systems | Josh Bertram Peng Wei Joseph Zambreno | 2022/1/13 |
An efficient hardware architecture for sparse convolution using linear feedback shift registers | Murad Qasaimeh Joseph Zambreno Phillip H Jones | 2021/7/7 | |
Benchmarking vision kernels and neural network inference accelerators on embedded platforms | Journal of Systems Architecture | Murad Qasaimeh Kristof Denolf Alireza Khodamoradi Michaela Blott Jack Lo | 2021/2/1 |
Scalable fastmdp for pre-departure airspace reservation and strategic de-conflict | Josh Bertram Peng Wei Joseph Zambreno | 2021 | |
Changing an Electrical and Computer Engineering Department Culture from the Bottom Up: Action Plans Generated from Faculty Interviews | 2020 ASEE Virtual Annual Conference | Elise Frickey Diane Rover Joseph Zambreno Ashfaq Khokhar Douglas Jacobson | 2020/6 |
Reverse engineering controller area network messages using unsupervised machine learning | IEEE Consumer Electronics Magazine | Uchenna Ezeobi Habeeb Olufowobi Clinton Young Joseph Zambreno Gedare Bloom | 2020/9/11 |
Summer Engagement in Cyber Undergraduate Research Experiences (SECURE) | Douglas Jacobson Diane Rover Joseph Zambreno Allegra Frickel | 2020/1/1 | |
Cynapse: A low-power reconfigurable neural inference accelerator for spiking neural networks | Journal of Signal Processing Systems | Saunak Saha Henry Duwe Joseph Zambreno | 2020/9 |
Embedding online runtime verification for fault disambiguation on Robonaut2 | Brian Kempa Pei Zhang Phillip H Jones Joseph Zambreno Kristin Yvonne Rozier | 2020/8/25 | |
Parahist: Fpga implementation of parallel event-based histogram for optical flow calculation | Mohammad Pivezhandi Phillip H Jones Joseph Zambreno | 2020/7/6 | |
Towards reverse engineering controller area network messages using machine learning | Clinton Young Jordan Svoboda Joseph Zambreno | 2020/6/2 |