Jie Gu
North Western University
H-index: 20
Asia-Bangladesh
Top articles of Jie Gu
Title | Journal | Author(s) | Publication Date |
|---|---|---|---|
33.2 A Sub-1μJ/class Headset-Integrated Mind Imagery and Control SoC for VR/MR Applications with Teacher-Student CNN and General-Purpose Instruction Set Architecture | Zhiwei Zhong* Yijie Wei* Lance Christopher Go Jie Gu | 2024/2/18 | |
20.4 A 28nm Physics Computing Unit Supporting Emerging Physics-Informed Neural Network and Finite Element Method for Real-Time Scientific Computing on Edge Devices | Yuhao Ju Ganqi Xu Jie Gu | 2024/2/18 | |
Computing-in-memory accelerator design with dynamic analog RAM cell and associated low power techniques with sparsity management | 2024/4/9 | ||
A 65nm Fully-integrated Fast-switching Buck Converter with Resonant Gate Drive and Automatic Tracking | Xi Chen Aly Shoukry Tianyu Jia Xin Zhang Raveesh Magod | 2023/4/23 | |
Development of Tropical Algebraic Accelerator with Energy Efficient Time-Domain Computing for Combinatorial Optimization and Machine Learning | Qiankai Cao Xi Chen Jie Gu | 2023/8/7 | |
Systolic neural cpu processor | 2023/6/29 | ||
Human Activity Recognition SoC for AR/VR with Integrated Neural Sensing, AI Classifier and Chained Infrared Communication for Multi-chip Collaboration | Yijie Wei Xi Chen Jie Gu | 2023/6/11 | |
Sparse convolutional neural network accelerator for 3d/4d point-cloud image recognition | 2023/11/30 | ||
Proactive Power Regulation with Real-time Prediction and Fast Response Guardband for Fine-grained Dynamic Voltage Droop Mitigation on Digital SoCs | Xi Chen Jiaxiang Feng Aly Shoukry Xin Zhang Raveesh Magod | 2023/6/11 | |
Instruction driven dynamic clock management for deep pipeline and out-of-order operation of microprocessor using on-chip critical path messenger and elastic pipeline clocking | 2023/11/28 | ||
A General-Purpose Compute-in-Memory Processor Combining CPU and Deep Learning with Elevated CPU Efficiency and Enhanced Data Locality | Yuhao Ju Yijie Wei Xi Chen Jie Gu | 2023/6/11 | |
Dynamic Timing Enhanced Computing for Microprocessor and Deep Learning Accelerators | Jie Gu Russ Joseph | 2023/11/3 | |
A sparse convolution neural network accelerator for 3D/4D point-cloud image recognition on low power mobile device with hopping-index rule book for efficient coordinate management | Qiankai Cao Jie Gu | 2022/6/12 | |
Compute-adaptive clock management for machine learning accelerators | 2022/12/6 | ||
A 65nm systolic neural CPU processor for combined deep learning and general-purpose computing with 95% PE utilization, high data locality and enhanced end-to-end performance | Yuhao Ju Jie Gu | 2022/2/20 | |
A systolic neural CPU processor combining deep learning and general-purpose computing with enhanced data locality and end-to-end performance | IEEE Journal of Solid-State Circuits | Yuhao Ju Jie Gu | 2022/10/27 |
System and method for pipelined time-domain computing using time-domain flip-flops and its application in time-series analysis | 2022/10/11 | ||
A Differentiable Neural Computer for Logic Reasoning with Scalable Near-Memory Computing and Sparsity Based Enhancement | Yuhao Ju Shiyu Guo Zixuan Liu Tianyu Jia Jie Gu | 2022/9/19 | |
Human emotion based real-time memory and computation management on resource-limited edge devices | Yijie Wei Zhiwei Zhong Jie Gu | 2022/7/10 | |
Energy-Proportional Data Center Network Architecture Through OS, Switch and Laser Co-design | arXiv preprint arXiv:2112.02083 | Haiyang Han Nikos Terzenidis Dimitris Syrivelis Arash F Beldachi George T Kanellos | 2021/12/3 |
