Jia Di
University of Arkansas
H-index: 25
North America-United States
Top articles of Jia Di
Title | Journal | Author(s) | Publication Date |
|---|---|---|---|
An Internet of Things Testbed for Education and Community Research | John Swaim Chad Workman Jia Di Xiaojiang Du | 2023/9/16 | |
Case Study for Skewing MTNCL Circuits | Cole Sherrill Kyle Orman Nicholas Brown Jia Di | 2023/7/16 | |
Digital Twin of an ANPC inverter with integrated Design-For-Trust | Paulo Custodio Brady McBride Thao Le Justin Jackson Kelby Haulmark | 2022/9/1 | |
Built-in self-test for multi-threshold null convention logic asynchronous circuits using pipeline stage parallelism | Journal of Electronic Testing | Brett Sparkman Scott C Smith Jia Di | 2022/6 |
Designing asynchronous circuits using NULL convention logic (NCL) | Scott Smith Jia Di | 2022/6/1 | |
A Framework of an IoT Testbed | Chad Workman Gavin Tomlinson Jia Di Xiaojiang Du Qiang Zeng | 2022/3/26 | |
Using dummy data for RFID tag and reader authentication | Digital Communications and Networks | Alsaify Baha’A Dale R Thompson Abdallah Alma'aitah Jia Di | 2022/10/1 |
Use It-No Need to Shake It! accurate implicit authentication for everyday objects with smart sensing | Proceedings of the ACM on Interactive, Mobile, Wearable and Ubiquitous Technologies | Chuxiong Wu Xiaopeng Li Fei Zuo Lannan Luo Xiaojiang Du | 2022/9/7 |
Rapid configuration of asynchronous recurrent neural networks for ASIC implementations | Spencer Nelson Wassim Khalil SangYun Kim Jia Di Zhe Zhou | 2021/9/20 | |
Nonvolatile NULL Convention Logic Pipeline Using Magnetic Tunnel Junctions | IEEE Transactions on Nanotechnology | Shaoqian Wei Erya Deng Jia Di Wang Kang Weisheng Zhao | 2021/9/14 |
Reconfigurable asic implementation of asynchronous recurrent neural networks | Spencer Nelson Sang Yun Kim Jia Di Zhe Zhou Zhihang Yuan | 2021/9/7 | |
Asynchronous polymorphic logic gate design | 2021/8/17 | ||
Character Reassignment for Hardware Trojan Detection | Noah Waller Hunter Nauman Derek Taylor Rafael Del Carmen Jia Di | 2021/8/9 | |
Design of asynchronous polymorphic logic gates for hardware security | Chandler Bernard William Bryant Richard Becker Jia Di | 2021/9/20 | |
Design and test of high-speed asynchronous circuits | Marly Roncken Ivan Sutherland J Di SC Smith | 2020/1/2 | |
A weak asynchronous reset (ARES) PUF using start-up characteristics of null conventional logic gates | Sreeja Chowdhury Rabin Acharya William Boullion Andrew Felder Mark Howard | 2020/11/1 | |
Asynchronous Circuit Applications | Jia Di Scott C Smith | 2020/1/2 | |
Wireless sensor node platform for in-plant stress monitoring | Affan Abbasi Marvin W Suggs Logan Walz Asma Mahar Ayesha Hassan | 2020/10/25 | |
Dual rail asynchronous logic design methodologies for side channel attack mitigation | Asynchronous Circuit Applications | Jean Pierre T Habimana Jia Di | 2020/1/2 |
Asynchronous circuit stacking for simplified power management | 2020/10/13 |
