In-Cheol Park

In-Cheol Park

KAIST

H-index: 39

Asia-South Korea

About In-Cheol Park

In-Cheol Park, With an exceptional h-index of 39 and a recent h-index of 17 (since 2020), a distinguished researcher at KAIST, specializes in the field of VLSI for Communication, VLSI for Multimedia Application, Computer Architecture, SoC Design, Analog/Mixed IC.

His recent articles reflect a diverse array of research interests and contributions to the field:

Hardware-Friendly Approximation for Swish Activation and Its Implementation

Area-Efficient QC-LDPC Decoding Architecture With Thermometer Code-Based Sorting and Relative Quasi-Cyclic Shifting

A CNN inference accelerator on FPGA with compression and layer-chaining techniques for style transfer applications

In Situ Multi-Bit Decision for Successive Cancellation List Decoding of Polar Codes

High-speed counter with novel LFSR state extension

Interleaved local sorting for successive cancellation list decoding of polar codes

Real-time SSDLite object detection on FPGA

Hybrid convolution architecture for energy-efficient deep neural network processing

In-Cheol Park Information

University

Position

Professor of Electrical Engineering

Citations(all)

4910

Citations(since 2020)

1165

Cited By

4242

hIndex(all)

39

hIndex(since 2020)

17

i10Index(all)

116

i10Index(since 2020)

33

Email

University Profile Page

KAIST

Google Scholar

View Google Scholar Profile

In-Cheol Park Skills & Research Interests

VLSI for Communication

VLSI for Multimedia Application

Computer Architecture

SoC Design

Analog/Mixed IC

Top articles of In-Cheol Park

Title

Journal

Author(s)

Publication Date

Hardware-Friendly Approximation for Swish Activation and Its Implementation

IEEE Transactions on Circuits and Systems II: Express Briefs

Kangjoon Choi

Sungho Kim

Jeongmin Kim

In-Cheol Park

2024/4/29

Area-Efficient QC-LDPC Decoding Architecture With Thermometer Code-Based Sorting and Relative Quasi-Cyclic Shifting

IEEE Transactions on Circuits and Systems I: Regular Papers

Boseon Jang

Hyejung Jang

Sungho Kim

Kangjoon Choi

In-Cheol Park

2024/4/23

A CNN inference accelerator on FPGA with compression and layer-chaining techniques for style transfer applications

IEEE Transactions on Circuits and Systems I: Regular Papers

Suchang Kim

Boseon Jang

Jaeyoung Lee

Hyungjoon Bae

Hyejung Jang

...

2023/1/10

In Situ Multi-Bit Decision for Successive Cancellation List Decoding of Polar Codes

IEEE Access

Jaehyeon Park

Jaeyoung Lee

In-Cheol Park

2022/8/16

High-speed counter with novel LFSR state extension

IEEE Transactions on Computers

Hyungjoon Bae

Yujin Hyun

Suchang Kim

Sangsoo Park

Jaeyoung Lee

...

2022/6/30

Interleaved local sorting for successive cancellation list decoding of polar codes

IEEE Access

Wooyoung Kim

Yujin Hyun

Jaeyoung Lee

In-Cheol Park

2021/9/14

Real-time SSDLite object detection on FPGA

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Suchang Kim

Seungho Na

Byeong Yong Kong

Jaewoong Choi

In-Cheol Park

2021/3/19

Hybrid convolution architecture for energy-efficient deep neural network processing

IEEE Transactions on Circuits and Systems I: Regular Papers

Suchang Kim

Jihyuck Jo

In-Cheol Park

2021/2/25

Constant-time synchronous binary counter with minimal clock period

IEEE Transactions on Circuits and Systems II: Express Briefs

Yujin Hyun

In-Cheol Park

2021/1/25

IEEE CIRCUITS AND SYSTEMS SOCIETY

WEISHENG ZHAO

ELENA BLOKHINA

HELEN LI

AHMED ALI

REZA AZARDERAKHSH

...

2020

Reed solomon decoder and semiconductor device including the same

2020/12/29

Large-small sorting for successive cancellation list decoding of polar codes

IEEE access

Kyungpil Lee

In-Cheol Park

2020/5/20

See List of Professors in In-Cheol Park University(KAIST)