Hyungcheol Shin

About Hyungcheol Shin

Hyungcheol Shin, With an exceptional h-index of 39 and a recent h-index of 19 (since 2020), a distinguished researcher at Seoul National University, specializes in the field of CMOS logic technology, DRAM cell, NAND flash memory.

His recent articles reflect a diverse array of research interests and contributions to the field:

Program Start Bias Grouping to Compensate for the Geometric Property of a String in 3-D NAND Flash Memory

A New Physical Model for Program Transients of Cylindrical Charge-Trap-Based NAND Flash Memories

A more practical indicator of MAC operational power efficiency inside memory-based synapse array

Investigation of Endurance Characteristics in 3-D nand Flash Memory With Trap Profile Analysis

Monte Carlo Simulator for Threshold Voltage Distribution of 3-D nand Flash Memory Using Machine Learning

Temperature Dependence Modeling of Grain Boundary Barrier Height in Macaroni MOSFETs

An Innovative Program Scheme for Reducing Z-Interference in Charge-Trap-Based 3-D NAND Flash Memory

Modeling of Threshold Voltage Shift by Neighboring Transistors for Macaroni Channel MOSFETs in Series

Hyungcheol Shin Information

University

Position

Department of Electrical and Computer Engineering

Citations(all)

7153

Citations(since 2020)

1937

Cited By

5227

hIndex(all)

39

hIndex(since 2020)

19

i10Index(all)

184

i10Index(since 2020)

55

Email

University Profile Page

Google Scholar

Hyungcheol Shin Skills & Research Interests

CMOS logic technology

DRAM cell

NAND flash memory

Top articles of Hyungcheol Shin

Program Start Bias Grouping to Compensate for the Geometric Property of a String in 3-D NAND Flash Memory

IEEE Journal of the Electron Devices Society

2024/3/8

Jongwoo Kim
Jongwoo Kim

H-Index: 5

Hyungcheol Shin
Hyungcheol Shin

H-Index: 17

A New Physical Model for Program Transients of Cylindrical Charge-Trap-Based NAND Flash Memories

IEEE Transactions on Electron Devices

2024/2/16

Hyungcheol Shin
Hyungcheol Shin

H-Index: 17

A more practical indicator of MAC operational power efficiency inside memory-based synapse array

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE

2024/2

Investigation of Endurance Characteristics in 3-D nand Flash Memory With Trap Profile Analysis

IEEE Transactions on Electron Devices

2024/1/22

Monte Carlo Simulator for Threshold Voltage Distribution of 3-D nand Flash Memory Using Machine Learning

IEEE Transactions on Electron Devices

2023/12/5

Hyungcheol Shin
Hyungcheol Shin

H-Index: 17

Temperature Dependence Modeling of Grain Boundary Barrier Height in Macaroni MOSFETs

IEEE Transactions on Electron Devices

2023/12/1

Juhyun Kim
Juhyun Kim

H-Index: 17

Hyungcheol Shin
Hyungcheol Shin

H-Index: 17

An Innovative Program Scheme for Reducing Z-Interference in Charge-Trap-Based 3-D NAND Flash Memory

IEEE Transactions on Electron Devices

2023/10/17

Jongwoo Kim
Jongwoo Kim

H-Index: 5

Hyungcheol Shin
Hyungcheol Shin

H-Index: 17

Modeling of Threshold Voltage Shift by Neighboring Transistors for Macaroni Channel MOSFETs in Series

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

2023/8/7

Quan Nguyen-Gia
Quan Nguyen-Gia

H-Index: 2

Hyungcheol Shin
Hyungcheol Shin

H-Index: 17

Synapse Array with Buried Bottom Gate Structure for Neuromorphic Systems

2023/6/11

A Compact Model for Transient Program Operation of Barrier Engineered Charge-Trapping NAND Flash Memories

대한전자공학회 학술대회

2023/6

Hyungcheol Shin
Hyungcheol Shin

H-Index: 17

A Novel Read Scheme using GIDL Current to Suppress Read Disturbance in 3-D NAND Flash Memories

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

2023/5/30

Jongwoo Kim
Jongwoo Kim

H-Index: 5

Hyungcheol Shin
Hyungcheol Shin

H-Index: 17

Investigation of endurance degradation for 3-D charge trap NAND flash memory with bandgap-engineered tunneling oxide

IEICE Electronics Express

2022/12/25

Modeling of grain boundary barrier height for undoped polycrystalline silicon channel in macaroni MOSFETs

IEEE Transactions on Electron Devices

2022/3/25

Juhyun Kim
Juhyun Kim

H-Index: 17

Hyungcheol Shin
Hyungcheol Shin

H-Index: 17

Investigation and modeling of Z-interference in poly-Si channel-based 3-D NAND flash memories

IEEE Transactions on Electron Devices

2022/1/4

Hyungcheol Shin
Hyungcheol Shin

H-Index: 17

28nm CIS-compatible embedded STT-MRAM for frame buffer memory

2021/12/11

Prediction of random grain boundary variation effect of 3-D NAND flash memory using a machine learning approach

IEEE Transactions on Electron Devices

2021/12/7

Hyungcheol Shin
Hyungcheol Shin

H-Index: 17

Distinguishing capture cross-section parameter between GIDL erase compact model and TCAD

Japanese Journal of Applied Physics

2021/11/30

Hyungcheol Shin
Hyungcheol Shin

H-Index: 17

Analysis of the effect of residual holes on lateral migration during the retention operation in 3-D NAND flash memory

IEEE Transactions on Electron Devices

2021/10/29

Shinkeun Kim
Shinkeun Kim

H-Index: 1

Hyungcheol Shin
Hyungcheol Shin

H-Index: 17

Optimizing read disturb phenomenon with new read scheme by partial-boosting channel in 3-D NAND Flash memories

IEICE Electronics Express

2021/10/10

Hyungcheol Shin
Hyungcheol Shin

H-Index: 17

A potential model of triple macaroni channel MOSFETs in subthreshold region

IEEE Transactions on Electron Devices

2021/7/14

Quan Nguyen-Gia
Quan Nguyen-Gia

H-Index: 2

Hyungcheol Shin
Hyungcheol Shin

H-Index: 17

See List of Professors in Hyungcheol Shin University(Seoul National University)