Hyun-Sik Kim

Hyun-Sik Kim

KAIST

H-index: 15

Asia-South Korea

About Hyun-Sik Kim

Hyun-Sik Kim, With an exceptional h-index of 15 and a recent h-index of 12 (since 2020), a distinguished researcher at KAIST, specializes in the field of Analog IC Design, Power Management IC, Display Driver IC.

His recent articles reflect a diverse array of research interests and contributions to the field:

28.1 A Fully Integrated, Domino-Like-Buffered Analog LDO Achieving–28dB Worst-Case Power-Supply Rejection Across the Frequency Spectrum from 10Hz to 1GHz with 50pF On-Chip …

28.5 A 94.1%-Efficiency Parallel-SC Hybrid Buck Converter Designed Using VCR-Aware Topology Optimizer for a 4.2 A/mm² Current-Density FoM

8.2 A 96.9%-Peak-Efficiency Bilaterally-Symmetrical Hybrid Buck-Boost Converter Featuring Seamless Single-Mode Operation, Always-Reduced Inductor Current, and the Use of All …

26.1 A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5 μs Suitable for 240Hz-Frame-Rate Mobile Displays

A Fully Integrated Multi-Phase Voltage Regulator With Flying-Capacitor-Based Inter-Inductor Current Self-Balancing Scheme and Charge-Recycling Gate Driver

A Display Source-Driver IC Featuring Multistage-Cascaded 10-Bit DAC and True-DC-Interpolative Super-OTA Buffer

Exploring Ways to Minimize Dropout Voltage for Energy-Efficient Low-Dropout Regulators: Viable approaches that preserve performance

Output buffer, data driver, and display device having the same

Hyun-Sik Kim Information

University

Position

Assistant Professor of Electrical Engineering

Citations(all)

762

Citations(since 2020)

460

Cited By

481

hIndex(all)

15

hIndex(since 2020)

12

i10Index(all)

26

i10Index(since 2020)

18

Email

University Profile Page

Google Scholar

Hyun-Sik Kim Skills & Research Interests

Analog IC Design

Power Management IC

Display Driver IC

Top articles of Hyun-Sik Kim

Title

Journal

Author(s)

Publication Date

28.1 A Fully Integrated, Domino-Like-Buffered Analog LDO Achieving–28dB Worst-Case Power-Supply Rejection Across the Frequency Spectrum from 10Hz to 1GHz with 50pF On-Chip …

Jun-Gi Lee

Hong-Hyun Bae

Seunghyun Jang

Hyun-Sik Kim

2024/2/18

28.5 A 94.1%-Efficiency Parallel-SC Hybrid Buck Converter Designed Using VCR-Aware Topology Optimizer for a 4.2 A/mm² Current-Density FoM

Hyunki Han

Jeong-Hyun Cho

Woojin Jang

Yousung Park

Jiho Lee

...

2024/2/18

8.2 A 96.9%-Peak-Efficiency Bilaterally-Symmetrical Hybrid Buck-Boost Converter Featuring Seamless Single-Mode Operation, Always-Reduced Inductor Current, and the Use of All …

Dae-Hyeon Kim

Hyun-Sik Kim

2024/2/18

26.1 A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5 μs Suitable for 240Hz-Frame-Rate Mobile Displays

Yousung Park

Gyeong-Gu Kang

Gyu-Wan Lim

Seunghwa Shin

Yong-Sung Ahn

...

2024/2/18

A Fully Integrated Multi-Phase Voltage Regulator With Flying-Capacitor-Based Inter-Inductor Current Self-Balancing Scheme and Charge-Recycling Gate Driver

IEEE Journal of Solid-State Circuits

Jeong-Hyun Cho

Hong-Hyun Bae

Gyu-Wan Lim

Tae-Hwang Kong

Jun-Hyeok Yang

...

2024/2/9

A Display Source-Driver IC Featuring Multistage-Cascaded 10-Bit DAC and True-DC-Interpolative Super-OTA Buffer

IEEE Journal of Solid-State Circuits

Seunghwa Shin

Gyeong-Gu Kang

Gyu-Wan Lim

Hyun-Sik Kim

2024/2/6

Exploring Ways to Minimize Dropout Voltage for Energy-Efficient Low-Dropout Regulators: Viable approaches that preserve performance

IEEE Solid-State Circuits Magazine

Hyun-Sik Kim

2023/6/20

Output buffer, data driver, and display device having the same

2023/12/5

A Mobile OLED Source-Driver IC featuring Ultra-Compact 3-Stage-Cascaded 10-Bit DAC and 42V/μs-Slew-Rate True-DC-Interpolative Super-OTA Buffer

Seunghwa Shin

Gyeong-Gu Kang

Gyu-Wan Lim

Hyun-Sik Kim

2023/6/11

DATA DRIVING CIRCUIT AND DISPLAY DEVICE INCLUDING THE SAME

2023/10/12

A 4-to-42V Input, 95.5% Efficiency, 3.2μA-IQ, DC-DC Buck Converter Featuring a Leakage-Emulated Bootstrap Re-fresher and Anti-Deadlock Self-Bias Supply for …

Heejun Lee

Hyunki Han

Hyun-Sik Kim

2023/4/23

A 4-to-42 V Input 3.3 V Output Self-Biased DC-DC Buck Converter Featuring Leakage-Emulated Bootstrap Voltage Refresher and Anti-Deadlock

IEEE Solid-State Circuits Letters

Heejun Lee

Hyunki Han

Hyun-Sik Kim

2023/9/13

Amplifier circuit and display apparatus including the same

2023/8/22

An Area-Efficient 10-Bit Source-Driver IC With LSB-Stacked LV-to-HV-Amplify DAC for Mobile OLED Displays

IEEE Journal of Solid-State Circuits

Gyu-Wan Lim

Gyeong-Gu Kang

Hyunggun Ma

Moonjae Jeong

Hyun-Sik Kim

2023/7/10

A Bipolar-Output Switched-Capacitor DC–DC Boost Converter With Residual-Energy-Recycling Regulation and Low Dropout Post-Filtering Techniques

IEEE Journal of Solid-State Circuits

Min-Woo Ko

Hyunki Han

Hyun-Sik Kim

2022/10/11

A 130V Triboelectric Energy-Harvesting Interface in. 18\mu\mathrm {m} $ BCD with Scalable Multi-Chip-Stacked Bias-Flip and Daisy-Chained Synchronous Signaling Technique

Jiho Lee

Sang-Han Lee

Gyeong-Gu Kang

Jae-Hyun Kim

Gyu-Hyeong Cho

...

2022/2/20

A 97.6%-Efficient 1-2MHz Hysteretic Buck Converter with 7V/μs DVS-Rate Enabled by Isosceles-Triangular Shunt Current Push-Pull Technique

Hong-Hyun Bae

Jeong-Hyun Cho

Gyeong-Gu Kang

Yousung Park

Hyun-Sik Kim

2022/6/12

A 1.23W/mm2 83.7%-Efficiency 400MHz 6-Phase Fully Integrated Buck Converter in 28nm CMOS with On-Chip Capacitor Dynamic Re-Allocation for Inter-Inductor …

Jeong-Hyun Cho

Dong-Kyu Kim

Hong-Hyun Bae

Yong-Jin Lee

Seok-Tae Koh

...

2022/2/20

A Pipeline ADC with Negative C-assisted SC Amplifier Canceling Gain Error and Nonlinearity

Woojin Jang

Gyeong-Gu Kang

Yong Lim

Hyun-Sik Kim

2022/9/19

A Fully-Integrated 0.9W/mm2 79.1%-Efficiency 200MHz Multi-Phase Buck Converter with Flying-Capacitor-Based Inter-Inductor Current Balancing Technique

Jeong-Hyun Cho

Hong-Hyun Bae

Gyu-Wan Lim

Tae-Hwang Kong

Jun-Hyeok Yang

...

2022/6/12

See List of Professors in Hyun-Sik Kim University(KAIST)