Hiroki Matsutani

Hiroki Matsutani

Keio University

H-index: 29

Asia-Japan

About Hiroki Matsutani

Hiroki Matsutani, With an exceptional h-index of 29 and a recent h-index of 16 (since 2020), a distinguished researcher at Keio University, specializes in the field of Computer Architecture, Machine Learning, Interconnection Network.

His recent articles reflect a diverse array of research interests and contributions to the field:

FPGA-Accelerated Correspondence-free Point Cloud Registration with PointNet Features

An Integrated FPGA Accelerator for Deep Learning-based 2D/3D Path Planning

A Cost-Efficient FPGA Implementation of Tiny Transformer Model using Neural ODE

An Edge-Server Partitioning Method for 3D LiDAR SLAM on FPGAs

Addressing Gap between Training Data and Deployed Environment by On-Device Learning

An FPGA-Based Accelerator for Graph Embedding using Sequential Training Algorithm

An Efficient Accelerator for Deep Learning-based Point Cloud Registration on FPGAs

A Lightweight Transformer Model using Neural ODE for FPGAs

Hiroki Matsutani Information

University

Position

Dept of ICS

Citations(all)

2920

Citations(since 2020)

1136

Cited By

2220

hIndex(all)

29

hIndex(since 2020)

16

i10Index(all)

61

i10Index(since 2020)

36

Email

University Profile Page

Keio University

Google Scholar

View Google Scholar Profile

Hiroki Matsutani Skills & Research Interests

Computer Architecture

Machine Learning

Interconnection Network

Top articles of Hiroki Matsutani

Title

Journal

Author(s)

Publication Date

FPGA-Accelerated Correspondence-free Point Cloud Registration with PointNet Features

arXiv preprint arXiv:2404.01237

Keisuke Sugiura

Hiroki Matsutani

2024/4/1

An Integrated FPGA Accelerator for Deep Learning-based 2D/3D Path Planning

IEEE Transactions on Computers

Keisuke Sugiura

Hiroki Matsutani

2024/3/18

A Cost-Efficient FPGA Implementation of Tiny Transformer Model using Neural ODE

arXiv preprint arXiv:2401.02721

Ikumi Okubo

Keisuke Sugiura

Hiroki Matsutani

2024/1/5

An Edge-Server Partitioning Method for 3D LiDAR SLAM on FPGAs

Mizuki Yasuda

Keisuke Sugiura

Ryuto Kojima

Hiroki Matsutani

2023/5/15

Addressing Gap between Training Data and Deployed Environment by On-Device Learning

IEEE Micro

Kazuki Sunaga

Masaaki Kondo

Hiroki Matsutani

2023/9/14

An FPGA-Based Accelerator for Graph Embedding using Sequential Training Algorithm

arXiv preprint arXiv:2312.15138

Kazuki Sunaga

Keisuke Sugiura

Hiroki Matsutani

2023/12/23

An Efficient Accelerator for Deep Learning-based Point Cloud Registration on FPGAs

Keisuke Sugiura

Hiroki Matsutani

2023/3/1

A Lightweight Transformer Model using Neural ODE for FPGAs

Ikumi Okubo

Keisuke Sugiura

Hiroki Kawakami

Hiroki Matsutani

2023/5/15

Peer-to-Peer 連合学習における難読化モデル交換の通信量削減

研究報告システム・アーキテクチャ (ARC)

八幡悠二郎, 杉浦圭祐, 松谷宏紀

2023/7/27

逐次学習可能なグラフ分散表現の FPGA アクセラレータ

研究報告ハイパフォーマンスコンピューティング (HPC)

須永一輝, 杉浦圭祐, 松谷宏紀

2023/11/28

スマート NIC を用いた連合学習の集約処理高速化の検討

研究報告システム・アーキテクチャ (ARC)

柴原尚紀, 星野優斗, 松谷宏紀

2023/1/3

Designing low‐diameter interconnection networks with multi‐ported host‐switch graphs

Concurrency and Computation: Practice and Experience

Ryota Yasudo

Koji Nakano

Michihiro Koibuchi

Hiroki Matsutani

Hideharu Amano

2023/5/15

A Case for Offloading Federated Learning Server on Smart NIC

arXiv preprint arXiv:2307.06561

Naoki Shibahara

Michihiro Koibuchi

Hiroki Matsutani

2023/7/13

Performance Improvement of Federated Learning Server using Smart NIC

Naoki Shibahara

Michihiro Koibuchi

Hiroki Matsutani

2023/11/27

Neural ODE を用いた FPGA 向け高効率マルチヘッド自己注意機構

研究報告システム・アーキテクチャ (ARC)

大久保郁海, 杉浦圭祐, 川上大輝, 松谷宏紀

2023/1/3

強化学習を用いた 3D LiDAR SLAM 向け入力点群削減手法

研究報告システムと LSI の設計技術 (SLDM)

小島瑠斗, 杉浦圭祐, 松谷宏紀

2023/3/16

A low-cost neural ODE with depthwise separable convolution for edge domain adaptation on fpgas

IEICE TRANSACTIONS on Information and Systems

Hiroki Kawakami

Hirohisa Watanabe

Keisuke Sugiura

Hiroki Matsutani

2023/7/1

A Lightweight Reinforcement Learning Based Packet Routing Method Using Online Sequential Learning

IEICE TRANSACTIONS on Information and Systems

Kenji Nemoto

Hiroki Matsutani

2023/11/1

エッジ-サーバ協調型 LiDAR SLAM の FPGA へのオフロード手法

研究報告システム・アーキテクチャ (ARC)

安田瑞生, 小島瑠斗, 杉浦圭祐, 松谷宏紀

2023/1/3

点群特徴抽出の FPGA による高速化

研究報告システムと LSI の設計技術 (SLDM)

杉浦圭祐, 小島瑠斗, 松谷宏紀

2023/3/16

See List of Professors in Hiroki Matsutani University(Keio University)