Haozhe Zhu (朱浩哲)

About Haozhe Zhu (朱浩哲)

Haozhe Zhu (朱浩哲), With an exceptional h-index of 6 and a recent h-index of 6 (since 2020), a distinguished researcher at Fudan University, specializes in the field of ASIC, Deep Learning, Computing in Memory, FPGA.

His recent articles reflect a diverse array of research interests and contributions to the field:

Trident-CIM: A LUT-Based Compute-in-Memory Macro With Trident Read Bit-Line and Partial Product Pruning

Bit-Offsetter: A Bit-serial DNN Accelerator with Weight-offset MAC for Bit-wise Sparsity Exploitation

A Scalable Die-to-Die Interconnect with Replay and Repair Schemes for 2.5 D/3D Integration

A Event-Driven Neural Spike Sorting Processor with Sparsity-Aware Computing-In-Memory Macros

16.2 A 28nm 53.8 TOPS/W 8b sparse transformer accelerator with in-memory butterfly zero skipper for unstructured-pruned NN and CIM-based local-attention-reusable engine

COMB-MCM: Computing-on-memory-boundary NN processor with bipolar bitwise sparsity optimization for scalable multi-chiplet-module edge machine learning

A 28 nm 81 Kb 59–95.3 TOPS/W 4T2R ReRAM computing-in-memory accelerator with voltage-to-time-to-digital based output

A 11.6 μ W Computing-on-Memory-Boundary Keyword Spotting Processor with Joint MFCC-CNN Ternary Quantization

Haozhe Zhu (朱浩哲) Information

University

Position

___

Citations(all)

103

Citations(since 2020)

98

Cited By

22

hIndex(all)

6

hIndex(since 2020)

6

i10Index(all)

4

i10Index(since 2020)

4

Email

University Profile Page

Google Scholar

Haozhe Zhu (朱浩哲) Skills & Research Interests

ASIC

Deep Learning

Computing in Memory

FPGA

Top articles of Haozhe Zhu (朱浩哲)

Title

Journal

Author(s)

Publication Date

Trident-CIM: A LUT-Based Compute-in-Memory Macro With Trident Read Bit-Line and Partial Product Pruning

IEEE Transactions on Circuits and Systems II: Express Briefs

Haozhe Zhu

Hongyi Zhang

Siqi He

Mengjie Li

Xiaoyang Zeng

...

2024/3/11

Bit-Offsetter: A Bit-serial DNN Accelerator with Weight-offset MAC for Bit-wise Sparsity Exploitation

Siqi He

Hongyi Zhang

Mengjie Li

Haozhe Zhu

Chixiao Chen

...

2023/6/11

A Scalable Die-to-Die Interconnect with Replay and Repair Schemes for 2.5 D/3D Integration

Jie Liao

Bo Jiao

Jinshan Zhang

Shiwei Liu

Hao Jiang

...

2023/5/21

A Event-Driven Neural Spike Sorting Processor with Sparsity-Aware Computing-In-Memory Macros

Hao Jiang

Jiapei Zheng

Yunzhengmao Wang

Jinshan Zhang

Haozhe Zhu

...

2023/5/21

16.2 A 28nm 53.8 TOPS/W 8b sparse transformer accelerator with in-memory butterfly zero skipper for unstructured-pruned NN and CIM-based local-attention-reusable engine

Shiwei Liu

Peizhe Li

Jinshan Zhang

Yunzhengmao Wang

Haozhe Zhu

...

2023/2/19

COMB-MCM: Computing-on-memory-boundary NN processor with bipolar bitwise sparsity optimization for scalable multi-chiplet-module edge machine learning

Haozhe Zhu

Bo Jiao

Jinshan Zhang

Xinru Jia

Yunzhengmao Wang

...

2022/2/20

A 28 nm 81 Kb 59–95.3 TOPS/W 4T2R ReRAM computing-in-memory accelerator with voltage-to-time-to-digital based output

IEEE Journal on Emerging and Selected Topics in Circuits and Systems

Keji Zhou

Xinru Jia

Chenyang Zhao

Xumeng Zhang

Guangjian Wu

...

2022/8/5

A 11.6 μ W Computing-on-Memory-Boundary Keyword Spotting Processor with Joint MFCC-CNN Ternary Quantization

Xinru Jia

Haozhe Zhu

Yunzheng Wang

Jinshan Zhang

Feng Lin

...

2022/5/27

An efficient Markov random field based denoising approach for dynamic vision sensor

Xi Cheng

Haozhe Zhu

Jingjing Liu

Mingyu Wang

Xiaoyang Zeng

2021/10/26

Computing Utilization Enhancement for Chiplet-based Homogeneous Processing-in-Memory Deep Learning Processors

Bo Jiao

Haozhe Zhu

Jinshan Zhang

Shunli Wang

Xiaoyang Kang

...

2021/6/22

ALPINE: An Agile Processing-in-Memory Macro Compilation Framework

Jinshan Zhang

Bo Jiao

Yunzhengmao Wang

Haozhe Zhu

Lihua Zhang

...

2021/6/22

A 0.57-gops/dsp object detection pim accelerator on fpga

Bo Jiao

Jinshan Zhang

Yuanyuan Xie

Shunli Wang

Haozhe Zhu

...

2021/1/18

A Communication-aware DNN accelerator on ImageNet using in-memory entry-counting based algorithm-circuit-architecture co-design in 65-nm CMOS

IEEE Journal on Emerging and Selected Topics in Circuits and Systems

Haozhe Zhu

Chixiao Chen

Shiwei Liu

Qiaosha Zou

Mingyu Wang

...

2020/8/7

XNORAM: An efficient computing-in-memory architecture for binary convolutional neural networks with flexible dataflow mapping

Shiwei Liu

Haozhe Zhu

Chixiao Chen

Lihua Zhang

C-J Richard Shi

2020/8/31

See List of Professors in Haozhe Zhu (朱浩哲) University(Fudan University)

Co-Authors

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