Enrico Reggiani

Enrico Reggiani

Politecnico di Milano

H-index: 7

Europe-Italy

About Enrico Reggiani

Enrico Reggiani, With an exceptional h-index of 7 and a recent h-index of 6 (since 2020), a distinguished researcher at Politecnico di Milano, specializes in the field of Hardware Architectures.

His recent articles reflect a diverse array of research interests and contributions to the field:

Efficient hardware acceleration of deep neural networks via arithmetic complexity reduction

Flex-sfu: Accelerating dnn activation functions by non-uniform piecewise approximation

Vitruvius+: an area-efficient RISC-V decoupled vector coprocessor for high performance computing applications

Mix-GEMM: An efficient HW-SW Architecture for Mixed-Precision Quantized Deep Neural Networks Inference on Edge Devices

Sargantana: An Academic SoC RISC-V Processor in 22nm FDSOI Technology

Adaptable register file organization for vector processors

Bison-e: A lightweight and high-performance accelerator for narrow integer linear algebra computing on the edge

DVINO: A RISC-V vector processor implemented in 65nm technology

Enrico Reggiani Information

University

Position

___

Citations(all)

148

Citations(since 2020)

119

Cited By

62

hIndex(all)

7

hIndex(since 2020)

6

i10Index(all)

6

i10Index(since 2020)

4

Email

University Profile Page

Politecnico di Milano

Google Scholar

View Google Scholar Profile

Enrico Reggiani Skills & Research Interests

Hardware Architectures

Top articles of Enrico Reggiani

Title

Journal

Author(s)

Publication Date

Efficient hardware acceleration of deep neural networks via arithmetic complexity reduction

Enrico Reggiani

2023/10/26

Flex-sfu: Accelerating dnn activation functions by non-uniform piecewise approximation

Enrico Reggiani

Renzo Andri

Lukas Cavigelli

2023/7/9

Vitruvius+: an area-efficient RISC-V decoupled vector coprocessor for high performance computing applications

ACM Transactions on Architecture and Code Optimization

Francesco Minervini

Oscar Palomar

Osman Unsal

Enrico Reggiani

Josue Quiroga

...

2023/3/1

Mix-GEMM: An efficient HW-SW Architecture for Mixed-Precision Quantized Deep Neural Networks Inference on Edge Devices

Enrico Reggiani

Alessandro Pappalardo

Max Doblas

Miquel Moreto

Mauro Olivieri

...

2023/2/25

Sargantana: An Academic SoC RISC-V Processor in 22nm FDSOI Technology

Max Doblas

Gerard Candón

Xavier Carril

Marc Domínguez

Enric Erra

...

2023/11/15

Adaptable register file organization for vector processors

Cristobal Ramirez Lazo

Enrico Reggiani

Carlos Rojas Morales

Roger Figueras Bagué

Luis A Villa Vargas

...

2022/4/2

Bison-e: A lightweight and high-performance accelerator for narrow integer linear algebra computing on the edge

Enrico Reggiani

Cristóbal Ramírez Lazo

Roger Figueras Bagué

Adrián Cristal

Mauro Olivieri

...

2022/2/28

DVINO: A RISC-V vector processor implemented in 65nm technology

Guillem Cabo

Gerard Candón

Xavier Carril

Max Doblas

Marc Domínguez

...

2022/11/16

Enhancing the scalability of multi-fpga stencil computations via highly optimized hdl components

ACM Transactions on Reconfigurable Technology and Systems (TRETS)

Enrico Reggiani

Emanuele Del Sozzo

Davide Conficconi

Giuseppe Natale

Carlo Moroni

...

2021/8/12

Performance portable fpga design

Nils Voss

Tobias Becker

Simon Tilbury

Georgi Gaydadjiev

Oskar Mencer

...

2020/2/23

See List of Professors in Enrico Reggiani University(Politecnico di Milano)