Dr.Sakthivel Ramachandran
VIT University
H-index: 10
Asia-India
Top articles of Dr.Sakthivel Ramachandran
Title | Journal | Author(s) | Publication Date |
|---|---|---|---|
The Artificial Neuron: Built From Nanosheet Transistors to Achieve Ultra Low Power Consumption | IEEE Access | I Munavar Sheriff R Sakthivel | 2024/1/5 |
Retraction Note to: Low power area optimized and high speed carry select adder using optimized half sum and carry generation unit for FIR filter | R Sakthivel G Ragunath | 2023/4 | |
AES Algorithm with Dynamic Shift Rows and Bit Permuted Mix Column | JR Navneet Ritika Patil Omkar Sawant Sridhar Madasamy R Sakthivel | 2023/12/14 | |
Hardware Optimization for Effective Switching Power Reduction during Data Compression in GOLOMB Rice Coding | R Sakthivel Vijayalakshmi Chintamaneni Suman Tenali M Vanitha Dalia H Elkamchouchi | 2023/5/22 | |
Mixed Logic Style Decoders for Low Power High Speed Applications | Sathiyakeerthi Madasamy R Sakthivel M Vanitha | 2023/5/5 | |
An efficient hardware architecture based on an ensemble of deep learning models for COVID-19 prediction | Sustainable Cities and Society | R Sakthivel I Sumaiya Thaseen M Vanitha M Deepa M Angulakshmi | 2022/5/1 |
Memristor Based CAM Cell Designs and Analaysis of Their Performance | Jugi Rithanya RP K Pooja R Sakthivel | 2022/4/22 | |
Vedic Multiplier and Wallace Tree Adders Based Optimised Processing Element Unit for CNN on FPGA | OK Dhanya Y Premson R Sakthivel | 2022/12/16 | |
Neuron Network with a Synapse of CMOS transistor and Anti-Parallel Memristors for Low power Implementations | Journal of Circuits, Systems and Computers | V Keerthy Rai R Sakthivel | 2022/8/22 |
Mathematical and Circuit Level Analysis Interpretation and Recommendations on Neuron Models | I Munavar Sheriff R Sakthivel | 2022/8/7 | |
Low Power 3-Bit Encoder Design using Memristor | Suri Shanmukh Sompalli RohitKumar Paluru Hemaprasad R Sakthivel | 2022/6/24 | |
LUT and LUT-Less Multiplier Architecture for Low Power Adaptive Filter | Ankita Gupta Vijetha Kanchan Shyam Kumar Choudhary R Sakthivel | 2021 | |
Comparative review of MAC architectures | Purra Dinesh Kishore Sanapala Grande Naga Jyothi R Sakthivel | 2021 | |
Near-zero computing using NCFET for IoT applications | International Journal of Intelligent Enterprise | Kishore Sanapala SVV Satyanarayana R Sakthivel | 2021 |
Designs protracted to combinational and sequential circuits by using hybrid MOS transistor with memristor | International Journal of Advanced Technology and Engineering Exploration | V Keerthy Rai R Sakthivel | 2021/12/1 |
Low power area optimized and high speed carry select adder using optimized half sum and carry generation unit for FIR filter | Journal of Ambient Intelligence and Humanized Computing | Ramachandran Sakthivel G Ragunath | 2021/5 |
VLSI system architecture optimisation for DLMS adaptive filter using PPG based multiplier | International Journal of System of Systems Engineering | Y Premson R Sakthivel | 2021 |
Implementation of D-flipflop using Hybrid Memristor with CMOS Transistor | Helix-The Scientific Explorer| Peer Reviewed Bimonthly International Journal | R Sakthivel V Keerthy Rai | 2020/4/30 |
Single bit fault detecting ALU design using reversible gates | Muskan Bhusal R Rohith R Sakthivel | 2020/2/24 | |
Nonlinear System Modelling Using Programmable Hardware for Soft Computing Applications | M Vanitha R Sakthivel R Mangayarkarasi Suvarcha Sharma | 2020 |
Co-Authors
