Alexandre Levisse
École Polytechnique Fédérale de Lausanne
H-index: 12
Europe-Switzerland
Top articles of Alexandre Levisse
An Energy Efficient Soft SIMD Microarchitecture and Its Application on Quantized CNNs
IEEE Transactions on Very Large Scale Integration Systems
2024/3/5
HEEPocrates: An Ultra-Low-Power RISC-V Microcontroller for Edge-Computing Healthcare Applications
2024/3/10
Overflow-free compute memories for edge AI acceleration
ACM Transactions on Embedded Computing Systems
2023/9/9
Flavio Ponzina
H-Index: 1
Alexandre Levisse
H-Index: 8
Giovanni Ansaloni
H-Index: 12
David Atienza
H-Index: 29
An Error-Based Approximation Sensing Circuit for Event-Triggered Low-Power Wearable Sensors
IEEE Journal on Emerging and Selected Topics in Circuits and Systems
2023/4/24
Bit-line computing for CNN accelerators co-design in edge AI inference
IEEE Transactions on Emerging Topics in Computing
2023/1/23
Flavio Ponzina
H-Index: 1
Alexandre Levisse
H-Index: 8
Giovanni Ansaloni
H-Index: 12
David Atienza
H-Index: 29
A Soft SIMD Based Energy Efficient Computing Microarchitecture
arXiv preprint arXiv:2212.09358
2022/12/19
Alexandre Levisse
H-Index: 8
Mohit Gupta
H-Index: 4
Giovanni Ansaloni
H-Index: 12
David Atienza
H-Index: 29
Alpine: Analog in-memory acceleration with tight processor integration for deep learning
IEEE Transactions on Computers
2022/12/19
Yasir Mahmood Qureshi
H-Index: 4
Alexandre Levisse
H-Index: 8
Giovanni Ansaloni
H-Index: 12
David Atienza
H-Index: 29
Graphene-based wireless agile interconnects for massive heterogeneous multi-chip processors
IEEE Wireless Communications
2022/8/9
A hardware/software co-design vision for deep learning at the edge
IEEE Micro
2022/8/1
Flavio Ponzina
H-Index: 1
Alexandre Levisse
H-Index: 8
Giovanni Ansaloni
H-Index: 12
David Atienza
H-Index: 29
Error resilient in-memory computing architecture for cnn inference on the edge
2022/6/6
Flavio Ponzina
H-Index: 1
Giovanni Ansaloni
H-Index: 12
Alexandre Levisse
H-Index: 8
David Atienza
H-Index: 29
Thermal and power-aware run-time performance management of 3d mpsocs with integrated flow cell arrays
2022/6/6
Thermal and Voltage-Aware Performance Management of 3-D MPSoCs With Flow Cell Arrays and Integrated SC Converters
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
2022/4/19
Alexandre Levisse
H-Index: 8
Giovanni Ansaloni
H-Index: 12
Miroslav Vasic
H-Index: 13
David Atienza
H-Index: 29
Associativity-agnostic in-cache computing memory architecture optimized for multiplication
2021/12/28
Modelling of vertical and ferroelectric junctionless technology for efficient 3D neural network compute cube dedicated to embedded artificial intelligence
2021/12/11
Exact neural networks from inexact multipliers via fibonacci weight encoding
2021/12/5
William Andrew Simon
H-Index: 7
Alexandre Levisse
H-Index: 8
Giovanni Ansaloni
H-Index: 12
David Atienza
H-Index: 29
Why neuromorphic computing need novel 3D technologies? A view from FVLLMONTI European project consortium
2021/10/25
Memory chip or memory array for wide-voltage range in-memory computing using bitline technology
2021/8/17
A flexible in-memory computing architecture for heterogeneously quantized CNNs
2021/7/7
Flavio Ponzina
H-Index: 1
Giovanni Ansaloni
H-Index: 12
Alexandre Levisse
H-Index: 8
David Atienza
H-Index: 29
Architecting more than Moore: wireless plasticity for massive heterogeneous computer architectures (WiPLASH)
2021/5/11
How novel technologies can boost neuromorphic computing? A view from European project consortia
Workshop NEUROTECH
2021/4/26
Co-Authors
