Aakanksha Mishra

About Aakanksha Mishra

Aakanksha Mishra, With an exceptional h-index of 3 and a recent h-index of 2 (since 2020), a distinguished researcher at Indian Institute of Technology Delhi, specializes in the field of Microelectronics, High Voltage RF Devices.

His recent articles reflect a diverse array of research interests and contributions to the field:

Modeling of inner-outer gates and temperature dependent gate-induced drain leakage current of junctionless double-gate-all-around FET

Extremely Large Breakdown to Snapback Voltage Offset : Another Way to Improve ESD Resilience of LDMOS Devices

Synthesis, Cannabinoid Receptor Targeted Molecular Docking of Some New Pyrazole Derivatives as Hypolipidemic and Anti-Obesity Agents.

Inverted SOA and Transient Non-Linearity of LDMOS Devices With RESURF-Implant

The Root Cause Behind a Peculiar Dual-Mode ON-State Breakdown in High Voltage LDMOS

Investigating the correlation between space charge modulation and on-state breakdown in multiple RESURF DeMOS devices

Geometrically Dependent Space Charge Modulation and Quasi-saturation Effect in Superjunction-LDMOS Device

Impact of space charge modulation on superjunction-LDMOS

Aakanksha Mishra Information

University

Indian Institute of Technology Delhi

Position

___

Citations(all)

51

Citations(since 2020)

33

Cited By

6

hIndex(all)

3

hIndex(since 2020)

2

i10Index(all)

1

i10Index(since 2020)

1

Email

University Profile Page

Indian Institute of Technology Delhi

Aakanksha Mishra Skills & Research Interests

Microelectronics

High Voltage RF Devices

Top articles of Aakanksha Mishra

Modeling of inner-outer gates and temperature dependent gate-induced drain leakage current of junctionless double-gate-all-around FET

Authors

Nitish Kumar,Aakanksha Mishra,Ankur Gupta,Pushpapraj Singh

Journal

Microelectronics Journal

Published Date

2024/4/1

In this paper, the temperature-dependent gate-induced drain leakage (GIDL) current model is proposed with the help of a lateral electric field (EL) across the inner and outer gate interfaces of the junctionless double-gate-all-around (JL-DGAA) field-effect transistor (FET). The EL at the interface is obtained from the surface potential equation after solving the 3D Poisson equation with appropriate boundary conditions. The derived model is validated using the well-calibrated TCAD simulator platform with experimental data. A higher GIDL current at the outer gate-channel interface is observed compared to the inner gate-channel interface in the OFF-state conditions due to the high EL between the channel and drain, which is reported for the first time here. The effect of temperature (from 200 K to 500 K) on the GIDL current is also observed, which increases linearly with increasing temperature. Further, the impact of …

Extremely Large Breakdown to Snapback Voltage Offset : Another Way to Improve ESD Resilience of LDMOS Devices

Authors

Aakanksha Mishra,B Sampath Kumar,M Monishmurali,Shaik Ahamed Suzaad,Shubham Kumar,Kiran Pote Sanjay,Amit Kumar Singh,Ankur Gupta,Mayank Shrivastava

Published Date

2023/3/26

Extremely large snapback voltage as an alternate way to improve the ESD robustness is proposed for the RESURF LDMOS devices which usually have low failure threshold. V t1 >> V BD is a “fail-to-protect” condition of the device which enables ESD protection to high-voltage power pins, expanding the ESD protection window for I/O applications. RESURF-implants in LDMOS result in lower I t1 , which is favorable for I/O devices with lower leakage. The effect of different LDMOS design approaches, load lines, and ESD stress duration on the V t1 is systematically evaluated, using TLP experiments and 3D TCAD simulations. Finally, device design engineering guidelines are presented to achieve large V t1 , while developing physical insights into the underlying mechanisms.

Synthesis, Cannabinoid Receptor Targeted Molecular Docking of Some New Pyrazole Derivatives as Hypolipidemic and Anti-Obesity Agents.

Authors

M Rani,R Chauhan,S Sharma,A Singh,A Mishra,H Badwik,J Dwivedi

Journal

Indian Journal of Pharmaceutical Sciences

Published Date

2023/3/1

Obesity is a serious health problem of 21st century. Around 1 billion adults are overweight and more than 300 million people are found to be obese globally. In fact 2.6 million people die per year due to obesity and thus it has now become a major reason of morbidity and mortality. In line to this few novel pyrazole derivatives (Z)-3-(4-subtituted phenyl)-2-(3, 5-dimethyl-1H-pyrazol-1-yl)-1-phenylprop-2-en-1-one (4a-f) were synthesized from 3, 5 dimethyl pyrazole by a simple inexpensive, rapid method. All compounds were authenticated using different physical and analytical techniques such as Infrared, 1H nuclear magnetic resonance, 13C nuclear magnetic resonance and mass spectrometry. Hypolipidemic activity was carried out for all the compounds using Triton WR 1339 induced hyperlipidemia model in rodents. Further, molecular docking was performed to understand the receptor-ligand interactions of …

Inverted SOA and Transient Non-Linearity of LDMOS Devices With RESURF-Implant

Authors

Aakanksha Mishra,Sampath Kumar Boeila,Avinash Kumar Singh,Shubhank Gupta,M Monishmurali,Amit Kumar Singh,Ankur Gupta,Mayank Shrivastava

Published Date

2022/12/11

Reduced surface field (RESURF) technique in the laterally double-diffused MOS (LDMOS) devices offers a promising solution of high voltage alternative over conventional LDMOS devices with improved figure of merits. This paper addresses the safe operating area (SOA) concerns and ON-state breakdown driven limitations of RESURF technique, highlighting the inverted SOA behavior. Using electrothermal simulations on TCAD tool, this work also investigates the influence of RESURF-implant on the lattice heating in the LDMOS devices.

The Root Cause Behind a Peculiar Dual-Mode ON-State Breakdown in High Voltage LDMOS

Authors

Aakanksha Mishra,Mayank Shrivastava,Ankur Gupta

Journal

IEEE Transactions on Electron Devices

Published Date

2022/2/23

This work investigates the often-observed current discontinuity much before avalanche breakdown (dual-mode ON-state breakdown) in the output characteristics of a laterally diffused metal–oxide–semiconductor (LDMOS) device. The physical origin of the dual-mode ON-state breakdown, often reasoned to be due to parasitic n-p-n, is shown to be independent of parasitic n-p-n. A laterally diffused tunnel FET (LDTFET) with a drift region profile same as LDMOS was experimented to rule out the effect of parasitic n-p-n. LDTFET device, which intrinsically cannot have parasitic n-p-n, also shows similar output characteristics with dual-mode ON-state breakdown. This proved that the parasitic bipolar turn-on is not the root cause behind the observed behavior. On the contrary, it was found to be dependent on the onset of space charge modulation (SCM) in the drift region, resulting in localized high electric field and quasi …

Investigating the correlation between space charge modulation and on-state breakdown in multiple RESURF DeMOS devices

Authors

Aakanksha Mishra,Ankur Gupta

Journal

IEEE Access

Published Date

2021/12/6

In this work, the ON-state performance of the drain-extended metal-oxide-semiconductor (DeMOS) device with multiple RESURF junctions in the drift region is explored. Although the additional RESURF implant offers a significant improvement in the breakdown voltage ( ) and ON-resistance ( ) compared to the conventional DeMOS, it induces an early space charge modulation (SCM) initiated quasi-saturation (QS) effects and adversely impacts the ON-state breakdown of the device. Moreover, these devices are compared for a fixed breakdown voltage where a correlation between their analog/RF performance and QS effects is established. This work also presents and validates the design guideline for multiple RESURF devices that can alleviate the SCM/QS effects by 8% and improve the ON-state breakdown voltage by 35% compared to the standard device, thereby maximizing the ON-state performance …

Geometrically Dependent Space Charge Modulation and Quasi-saturation Effect in Superjunction-LDMOS Device

Authors

Aakanksha Mishra,B Sampath Kumar,Jhnanesh Somayaji,Ankur Gupta

Published Date

2020/11/26

Increase in the demand of smart power technologies has posed a restriction on the breakdown voltage of the laterally diffused MOS (LDMOS) transistors. Superjunction-LDMOS devices have shown to offer a low on-resistance while extending the off-state breakdown voltage by the virtue of increasing depletion area in the drift region. This makes them highly suitable in fast switching applications. While they display an outstanding OFF-state performance, these devices severely suffer from space charge modulation (SCM) leading to quasisaturation (QS) effects under high current conditions. This not only affects the operation of the device, but also degrades its safe operating area. Thus, designing such devices in order to meet the off-state requirements while mitigating SCM/QS effect is challenging. Design of a superjunction (SJ) implant in the drift region is reliant on the key process and geometrical variables such as …

Impact of space charge modulation on superjunction-LDMOS

Authors

Aakanksha Mishra,B Sampath Kumar,Jhnanesh Somayaji,Mayank Shrivastava,Ankur Gupta

Published Date

2020/8/10

In this paper, we present the impact of Superjunction (SJ) implant on the performance challenges encountered by LDMOS in the ON state while developing insights into Space Charge Modulation (SCM) and Quasi-Saturation (QS) behavior in these devices. SJ-device is reported to have four times higher breakdown voltage than the conventional LDMOS device which proves to be an outstanding candidate for switching applications. This paper elucidates the design guidelines for SJ-devices in order to maximize the ON-state performance by mitigating SCM and QS effects while keeping in mind the OFF-state breakdown requirements.

See List of Professors in Aakanksha Mishra University(Indian Institute of Technology Delhi)

Aakanksha Mishra FAQs

What is Aakanksha Mishra's h-index at Indian Institute of Technology Delhi?

The h-index of Aakanksha Mishra has been 2 since 2020 and 3 in total.

What are Aakanksha Mishra's top articles?

The articles with the titles of

Modeling of inner-outer gates and temperature dependent gate-induced drain leakage current of junctionless double-gate-all-around FET

Extremely Large Breakdown to Snapback Voltage Offset : Another Way to Improve ESD Resilience of LDMOS Devices

Synthesis, Cannabinoid Receptor Targeted Molecular Docking of Some New Pyrazole Derivatives as Hypolipidemic and Anti-Obesity Agents.

Inverted SOA and Transient Non-Linearity of LDMOS Devices With RESURF-Implant

The Root Cause Behind a Peculiar Dual-Mode ON-State Breakdown in High Voltage LDMOS

Investigating the correlation between space charge modulation and on-state breakdown in multiple RESURF DeMOS devices

Geometrically Dependent Space Charge Modulation and Quasi-saturation Effect in Superjunction-LDMOS Device

Impact of space charge modulation on superjunction-LDMOS

are the top articles of Aakanksha Mishra at Indian Institute of Technology Delhi.

What are Aakanksha Mishra's research interests?

The research interests of Aakanksha Mishra are: Microelectronics, High Voltage RF Devices

What is Aakanksha Mishra's total number of citations?

Aakanksha Mishra has 51 citations in total.

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