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Mateusz Kuc

About Mateusz Kuc

Mateusz Kuc, With an exceptional h-index of 2 and a recent h-index of 2 (since 2020), a distinguished researcher at Politechnika Slaska, specializes in the field of LDPC, FPGA, Low Power.

His recent articles reflect a diverse array of research interests and contributions to the field:

Hardware implementation of the LDPC decoder in the FPGA structure

Low power QC-LDPC decoder based on token ring architecture

Sprzetowa implementacja nieregularnego dekodera QC-LDPC w strukturze FPGA

FPGA-oriented LDPC decoder for cyber-physical systems

Mateusz Kuc Information

University

Position

___

Citations(all)

10

Citations(since 2020)

10

Cited By

2

hIndex(all)

2

hIndex(since 2020)

2

i10Index(all)

0

i10Index(since 2020)

0

Email

University Profile Page

Google Scholar

Mateusz Kuc Skills & Research Interests

LDPC

FPGA

Low Power

Top articles of Mateusz Kuc

Hardware implementation of the LDPC decoder in the FPGA structure

AIP Conference Proceedings

2021/3/30

Mateusz Kuc
Mateusz Kuc

H-Index: 1

Low power QC-LDPC decoder based on token ring architecture

Energies

2020/11/30

Mateusz Kuc
Mateusz Kuc

H-Index: 1

Sprzetowa implementacja nieregularnego dekodera QC-LDPC w strukturze FPGA

2020/9/1

Mateusz Kuc
Mateusz Kuc

H-Index: 1

FPGA-oriented LDPC decoder for cyber-physical systems

Mathematics

2020/5/4

Mateusz Kuc
Mateusz Kuc

H-Index: 1

See List of Professors in Mateusz Kuc University(Politechnika Slaska)