madhav rao

About madhav rao

madhav rao, With an exceptional h-index of 10 and a recent h-index of 8 (since 2020), a distinguished researcher at International Institute of Information Technology Bangalore, specializes in the field of VLSI design, Surgical robotics, Assistive devices.

His recent articles reflect a diverse array of research interests and contributions to the field:

PA-SIE: Pixel-Attack Methodology Factored Selective Image Encryption Scheme for Low Resource Edge Computing Systems

Accelerated and highly correlated ASIC synthesis of AI hardware subsystems using CGP

A Fixed-Point Pre-Processing Hardware Architecture Design for Complex Independent Component Analysis

OEDASA: Optimization Enabled Error-Diluted Approximate Systolic Array Design for an Image Processing Application

EBACA: Efficient Bfloat16-based Activation Function Implementation Using Enhanced CORDIC Architecture

A Novel Magnetometer Array-based wearable system for ASL gesture recognition

FastNTT: Design and Evaluation of Modular-Reduction Based Fast NTT Design on FPGA

CWAHA: Cluster-Wise Approximation for Hardware implementation of Arithmetic functions

madhav rao Information

University

Position

___

Citations(all)

362

Citations(since 2020)

273

Cited By

126

hIndex(all)

10

hIndex(since 2020)

8

i10Index(all)

11

i10Index(since 2020)

3

Email

University Profile Page

Google Scholar

madhav rao Skills & Research Interests

VLSI design

Surgical robotics

Assistive devices

Top articles of madhav rao

PA-SIE: Pixel-Attack Methodology Factored Selective Image Encryption Scheme for Low Resource Edge Computing Systems

2024/2/18

Harshita Gupta
Harshita Gupta

H-Index: 3

Madhav Rao
Madhav Rao

H-Index: 5

Accelerated and highly correlated ASIC synthesis of AI hardware subsystems using CGP

IET Computers & Digital Techniques

2024/1/29

Madhav Rao
Madhav Rao

H-Index: 5

A Fixed-Point Pre-Processing Hardware Architecture Design for Complex Independent Component Analysis

2024/1/22

Madhav Rao
Madhav Rao

H-Index: 5

OEDASA: Optimization Enabled Error-Diluted Approximate Systolic Array Design for an Image Processing Application

2024/1/6

Madhav Rao
Madhav Rao

H-Index: 5

EBACA: Efficient Bfloat16-based Activation Function Implementation Using Enhanced CORDIC Architecture

2024/1/6

Madhav Rao
Madhav Rao

H-Index: 5

A Novel Magnetometer Array-based wearable system for ASL gesture recognition

2023/7/24

Madhav Rao
Madhav Rao

H-Index: 5

FastNTT: Design and Evaluation of Modular-Reduction Based Fast NTT Design on FPGA

2023/6/20

Harshita Gupta
Harshita Gupta

H-Index: 3

Madhav Rao
Madhav Rao

H-Index: 5

CWAHA: Cluster-Wise Approximation for Hardware implementation of Arithmetic functions

2023/6/20

Madhav Rao
Madhav Rao

H-Index: 5

Design and Evaluation of M-Term Non-Homogeneous Hybrid Karatsuba Polynomial Multiplier

2023/6/20

Madhav Rao
Madhav Rao

H-Index: 5

CellFlow: Automated Standard Cell Design Flow

2023/6/20

Madhav Rao
Madhav Rao

H-Index: 5

Design-Space Exploration of Multiplier Approximation in CNNs

2023/6/20

Madhav Rao
Madhav Rao

H-Index: 5

Design and evaluation of finite field multipliers using fast xnor cells

2023/6/5

Madhav Rao
Madhav Rao

H-Index: 5

Imac: A pre-multiplier and integrated reduction based multiply-and-accumulate unit

2023/6/5

Madhav Rao
Madhav Rao

H-Index: 5

Ebasa: Error balanced approximate systolic array architecture design

2023/6/5

Madhav Rao
Madhav Rao

H-Index: 5

RISC-V Core for Ethical Intelligent IoT Edge: Analysis & Design Choice

2023/5/1

A Novel Thermal Imaging Based Transfer-Learning Model To Estimate Blood Pressure

2023/4/18

Madhav Rao
Madhav Rao

H-Index: 5

Sqrtlib: Library of hardware square root designs

2023/4/5

Madhav Rao
Madhav Rao

H-Index: 5

Error diluted approximate multipliers using positive and negative compressors

2023/4/5

Madhav Rao
Madhav Rao

H-Index: 5

Design and Evaluation of multipliers for hardware accelerated on-chip EdDSA

2023/4/5

Harshita Gupta
Harshita Gupta

H-Index: 3

Madhav Rao
Madhav Rao

H-Index: 5

HIE-DRAM: High Performance Efficient In-DRAM Computing Architecture for SIMD

2023/4/5

Madhav Rao
Madhav Rao

H-Index: 5

See List of Professors in madhav rao University(International Institute of Information Technology Bangalore)