Guojie Luo

About Guojie Luo

Guojie Luo, With an exceptional h-index of 24 and a recent h-index of 18 (since 2020), a distinguished researcher at Peking University, specializes in the field of Electronic Design Automation, Reconfigurable Architecture.

His recent articles reflect a diverse array of research interests and contributions to the field:

The Dawn of AI-Native EDA: Promises and Challenges of Large Circuit Models

Rethinking IC Layout Vulnerability: Simulation-Based Hardware Trojan Threat Assessment with High Fidelity

OpenPARF: an open-source placement and routing framework for large-scale heterogeneous FPGAs with deep learning toolkit

Weave: Abstraction and Integration Flow for Accelerators of Generated Modules

PowerSyn: A Logic Synthesis Framework with Early Power Optimization

RF-SIFTER: Sifting Signals at Layer-0.5 to Mitigate Wideband Cross-Technology Interference for IoT

GDSII-Guard: ECO Anti-Trojan Optimization with Exploratory Timing-Security Trade-Offs

Per-RMAP: Feasibility-Seeking and Superiorization Methods for Floorplanning with I/O Assignment

Guojie Luo Information

University

Position

___

Citations(all)

2168

Citations(since 2020)

1191

Cited By

1415

hIndex(all)

24

hIndex(since 2020)

18

i10Index(all)

38

i10Index(since 2020)

27

Email

University Profile Page

Google Scholar

Guojie Luo Skills & Research Interests

Electronic Design Automation

Reconfigurable Architecture

Top articles of Guojie Luo

Rethinking IC Layout Vulnerability: Simulation-Based Hardware Trojan Threat Assessment with High Fidelity

2024/2/1

Jiaxi Zhang
Jiaxi Zhang

H-Index: 5

Guojie Luo
Guojie Luo

H-Index: 15

OpenPARF: an open-source placement and routing framework for large-scale heterogeneous FPGAs with deep learning toolkit

2023/10/24

Weave: Abstraction and Integration Flow for Accelerators of Generated Modules

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

2023/10/19

PowerSyn: A Logic Synthesis Framework with Early Power Optimization

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

2023/7/19

RF-SIFTER: Sifting Signals at Layer-0.5 to Mitigate Wideband Cross-Technology Interference for IoT

2023/7/10

GDSII-Guard: ECO Anti-Trojan Optimization with Exploratory Timing-Security Trade-Offs

2023/7/9

Jiaxi Zhang
Jiaxi Zhang

H-Index: 5

Guojie Luo
Guojie Luo

H-Index: 15

Per-RMAP: Feasibility-Seeking and Superiorization Methods for Floorplanning with I/O Assignment

2023/5/8

MEC: An Open-source Fine-grained Mapping Equivalence Checking Tool for FPGA

2023/5/8

Rethinking NPN Classification from Face and Point Characteristics of Boolean Functions

2023/4/17

Efficient Super-Resolution System with Block-wise Hybridization and Quantized Winograd on FPGA

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

2023/2/22

An Efficient Dataflow for Convolutional Generative Models

2023/12/12

Guojie Luo
Guojie Luo

H-Index: 15

F-TFM: Accelerating Total Focusing Method for Ultrasonic Array Imaging on FPGA

2023/12/12

Bizhao Shi
Bizhao Shi

H-Index: 1

Guojie Luo
Guojie Luo

H-Index: 15

An Intermediate-Centric Dataflow for Transposed Convolution Acceleration on FPGA

ACM Transactions on Embedded Computing Systems

2023/11/9

Fast Exact NPN Classification with Influence-aided Canonical Form

2023/10/28

Purlin: A Versatile Toolkit for the Generation and Simulation of On-Chip Networks

2022/10/23

Jiaxi Zhang
Jiaxi Zhang

H-Index: 5

Guojie Luo
Guojie Luo

H-Index: 15

ART-3D: Analytical 3D Placement with Reinforced Parameter Tuning for Monolithic 3D ICs

2022/4/13

Agile design of DCT circuit on soft CGRA

2022/2/18

Guojie Luo
Guojie Luo

H-Index: 15

Wei Yan
Wei Yan

H-Index: 5

EasyMAC: Design Exploration-Enabled Multiplier-Accumulator Generator Using a Canonical Architectural Representation

2022/1/17

BlockGNN: Towards Efficient GNN Acceleration Using Block-Circulant Weight Matrices

2021/12/5

See List of Professors in Guojie Luo University(Peking University)

Co-Authors

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