Cláudio Machado Diniz

Cláudio Machado Diniz

Universidade Federal do Rio Grande do Sul

H-index: 14

Latin America-Brazil

About Cláudio Machado Diniz

Cláudio Machado Diniz, With an exceptional h-index of 14 and a recent h-index of 10 (since 2020), a distinguished researcher at Universidade Federal do Rio Grande do Sul, specializes in the field of Video Coding, Hardware Architecture, Microelectronics.

His recent articles reflect a diverse array of research interests and contributions to the field:

Improving Video Streaming Quality in Congested Networks with In-Network Computing

Comparative Implementation of PicoSoC System-on-Chip in X-Fab 180 nm CMOS Technology

Low-Power Inverse Multiple Transform Hardware Design for 8K@ 60fps Real-Time VVC Decoding

Evaluation of Imprecise Subtractors into Test Zone Search for VVC Encoding

Multiversion Low-Power Hardware Accelerator for the AV1 Interpolation Filters

Multi-Size Inverse DCT-II Hardware Design for the VVC Decoder

Improving content-aware video streaming in congested networks with in-network computing

Guest Editors’ Introduction: SBCCI 2021

Cláudio Machado Diniz Information

University

Position

___

Citations(all)

623

Citations(since 2020)

346

Cited By

422

hIndex(all)

14

hIndex(since 2020)

10

i10Index(all)

22

i10Index(since 2020)

10

Email

University Profile Page

Universidade Federal do Rio Grande do Sul

Google Scholar

View Google Scholar Profile

Cláudio Machado Diniz Skills & Research Interests

Video Coding

Hardware Architecture

Microelectronics

Top articles of Cláudio Machado Diniz

Title

Journal

Author(s)

Publication Date

Improving Video Streaming Quality in Congested Networks with In-Network Computing

Leonardo Gobatto

Mateus Saquetti

Claudio Diniz

Bruno Zatt

Weverton Cordeiro

...

2024/2/27

Comparative Implementation of PicoSoC System-on-Chip in X-Fab 180 nm CMOS Technology

Journal of Integrated Circuits and Systems

Rodrigo Wuerdig

Leonardo H Brendler

Cláudio Diniz

Ricardo Reis

Sergio Bampi

2024/3/15

Low-Power Inverse Multiple Transform Hardware Design for 8K@ 60fps Real-Time VVC Decoding

Journal of Integrated Circuits and Systems

Bruna Garcia

Bianca Silveira

Claudio Diniz

Daniel Palomino

Guilherme Corrêa

2023/12/28

Evaluation of Imprecise Subtractors into Test Zone Search for VVC Encoding

Rafael Ferreira

Luciano Agostini

Cláudio M Diniz

Bruno Zatt

2023/8/28

Multiversion Low-Power Hardware Accelerator for the AV1 Interpolation Filters

Daiane Freitas

Mateus Grellert

Cláudio M Diniz

Guilherme Correa

2023/5/21

Multi-Size Inverse DCT-II Hardware Design for the VVC Decoder

Bruna Garcia

Bianca Silveira

Claudio Diniz

Daniel Palomino

Guilherme Correa

2023/2/28

Improving content-aware video streaming in congested networks with in-network computing

Leonardo Gobatto

Mateus Saquetti

Claudio Diniz

Bruno Zatt

Weverton Cordeiro

...

2022/5/27

Guest Editors’ Introduction: SBCCI 2021

IEEE Design & Test

Cláudio Machado Diniz

Bruno Zatt

2022/10/25

The 4-2 Fused Adder–Subtractor Compressor for Low-Power Butterfly-Based Hardware Architectures

Circuits, Systems, and Signal Processing

Bianca Silveira

Guilherme Paim

Brunno Alves Abreu

Rafael dos Santos Ferreira

Cláudio Machado Diniz

...

2022/3/1

VVC Interpicture Prediction Using SAD with Imprecise Subtractors: A Quantitative Analysis

Rafael Ferreira

Lucas Santos

Luciano Agostini

Cláudio M Diniz

Bruno Zatt

2022/10/24

High-throughput multifilter VLSI design for the AV1 fractional motion estimation

Daiane Freitas

Bruna Nagai

Mateus Grellert

Cláudio M Diniz

Guilherme Correa

2022/8/22

iCCell: Uma Abordagem Distribuída na Internet das Coisas para Contagem de Fibroblastos

Mateus Parker Porto

Cláudio Machado Diniz

Adenauer Corrêa Yamin

2022/7/31

Multiple transform selection hardware design for 4k@ 60fps real-time versatile video coding

Bianca Silveira

Luis Neto

Daniel Palomino

Cláudio Diniz

Guilherme Correa

2022/5/27

Hardware architecture for the regular interpolation filter of the AV1 video coding standard

Daiane Freitas

Rafael da Silva

Ícaro Siqueira

Cláudio M Diniz

Ricardo AL Reis

...

2021/1/18

Configurable approximate hardware accelerator to compute SATD and SAD metrics for low power all-intra high efficiency video coding

Victor HS Lima

Matheus F Stigger

Leonardo B Soares

Cláudio M Diniz

Sergio Bampi

2021/8/23

High-throughput sharp interpolation filter hardware architecture for the AV1 video codec

Daiane Freitas

Cláudio M Diniz

Mateus Grellert

Guilherme Correa

2021/8/23

Approximate hardware architecture for interpolation filter of versatile video coding

Journal of Integrated Circuits and Systems

Giovane Gomes Silva

Ícaro Gonçalves Siqueira

Mateus Grellert

Claudio Machado Diniz

2021/8/15

Exploring Absolute Differences Arithmetic Operators for Power and Area-Efficient SAD Hardware Architectures

Journal of Integrated Circuits and Systems

Brunno Alves Abreu

Mateus Grellert

Guilherme Paim

Leandro Mateus Giacomini Rocha

Cláudio Machado Diniz

...

2020/5/26

Approximate SATD hardware accelerator using the 8× 8 Hadamard transform

Matheus F Stigger

Victor HS Lima

Leonardo B Soares

Claudio M Diniz

Sergio Bampi

2020/2/25

See List of Professors in Cláudio Machado Diniz University(Universidade Federal do Rio Grande do Sul)

Co-Authors

H-index: 64
Jörg Henkel

Jörg Henkel

Karlsruher Institut für Technologie

H-index: 52
Muhammad Shafique

Muhammad Shafique

New York University

H-index: 32
Sergio Bampi

Sergio Bampi

Universidade Federal do Rio Grande do Sul

H-index: 26
Luciano Volcan Agostini

Luciano Volcan Agostini

Universidade Federal de Pelotas

H-index: 21
Bruno Zatt

Bruno Zatt

Universidade Federal de Pelotas

H-index: 14
Guilherme Corrêa

Guilherme Corrêa

Universidade Federal de Pelotas

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