Borivoje Nikolic

About Borivoje Nikolic

Borivoje Nikolic, With an exceptional h-index of 59 and a recent h-index of 32 (since 2020), a distinguished researcher at University of California, Berkeley, specializes in the field of Integrated circuits, VLSI, Communications, Signal Processing.

His recent articles reflect a diverse array of research interests and contributions to the field:

DiffuseLoco: Real-Time Legged Locomotion Control with Diffusion from Offline Datasets

AuRORA: Virtualized Accelerator Orchestration for Multi-Tenant Workloads

A Heterogeneous SoC for Bluetooth LE in 28nm

Rosé: A hardware-software co-simulation infrastructure enabling pre-silicon full-stack robotics soc evaluation

Cdpu: Co-designing compression and decompression processing units for hyperscale systems

Silicon Process Technology Constraints for Standardized Vertical Die-to-Die Interconnects

Guest Editorial Introduction to the Special Issue on the 2022 Symposium on VLSI Circuits

Simulator independent coverage for RTL hardware languages

Borivoje Nikolic Information

University

Position

___

Citations(all)

24499

Citations(since 2020)

5525

Cited By

22049

hIndex(all)

59

hIndex(since 2020)

32

i10Index(all)

187

i10Index(since 2020)

97

Email

University Profile Page

Google Scholar

Borivoje Nikolic Skills & Research Interests

Integrated circuits

VLSI

Communications

Signal Processing

Top articles of Borivoje Nikolic

DiffuseLoco: Real-Time Legged Locomotion Control with Diffusion from Offline Datasets

arXiv preprint arXiv:2404.19264

2024/4/30

AuRORA: Virtualized Accelerator Orchestration for Multi-Tenant Workloads

2023

A Heterogeneous SoC for Bluetooth LE in 28nm

2023/8/27

Rosé: A hardware-software co-simulation infrastructure enabling pre-silicon full-stack robotics soc evaluation

2023/6/17

Borivoje Nikolic
Borivoje Nikolic

H-Index: 33

Yakun Sophia Shao
Yakun Sophia Shao

H-Index: 16

Cdpu: Co-designing compression and decompression processing units for hyperscale systems

2023/6/17

Silicon Process Technology Constraints for Standardized Vertical Die-to-Die Interconnects

2023/4/23

Guest Editorial Introduction to the Special Issue on the 2022 Symposium on VLSI Circuits

Biomedical microdevices

2012/12

Simulator independent coverage for RTL hardware languages

2023/3/25

MoCA: Memory-centric, adaptive execution for multi-tenant deep neural networks

2023/2/25

Constellation: an open-source SoC-capable NoC generator

2022/10/2

Animesh Agrawal
Animesh Agrawal

H-Index: 4

Borivoje Nikolic
Borivoje Nikolic

H-Index: 33

An Adaptable and Scalable Generator of Distributed Massive MIMO Baseband Processing Systems

Journal of Signal Processing Systems

2022/10

ML for Analog Design: Good Progress, But More to Do

2022/9/12

Accelerating Deep Learning on Heterogenous Architectures

2022/5/13

Avinash Nandakumar
Avinash Nandakumar

H-Index: 1

Borivoje Nikolic
Borivoje Nikolic

H-Index: 33

An eight-core 1.44-GHz RISC-V vector processor in 16-nm FinFET

IEEE Journal of Solid-State Circuits

2021/11/9

A 71-to-86-GHz 16-element by 16-beam multi-user beamforming integrated receiver sub-array for massive MIMO

IEEE Journal of Solid-State Circuits

2021/10/29

A scalable generator for massive MIMO baseband processing systems with beamspace channel estimation

2021/10/19

A hardware accelerator for protocol buffers

2021/10/18

Automated design of analog circuits using reinforcement learning

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

2021/10/15

Borivoje Nikolic
Borivoje Nikolic

H-Index: 33

Design techniques for a 6.4–32-Gb/s 0.96-pJ/b continuous-rate CDR with stochastic frequency–phase detector

IEEE Journal of Solid-State Circuits

2021/10/13

A 16mm2 106.1 GOPS/W Heterogeneous RISC-V Multi-Core Multi-Accelerator SoC in Low-Power 22nm FinFET

2021/9/13

See List of Professors in Borivoje Nikolic University(University of California, Berkeley)

Co-Authors

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