Sheng Ma

About Sheng Ma

Sheng Ma, With an exceptional h-index of 14 and a recent h-index of 11 (since 2020), a distinguished researcher at National University of Defense Technology, specializes in the field of Computer Architecture, Microprocessor Design, AI Accelerator Design.

His recent articles reflect a diverse array of research interests and contributions to the field:

Spin-NeuroMem: A Low-Power Neuromorphic Associative Memory Design Based on Spintronic Devices

EPHA: An Energy-efficient Parallel Hybrid Architecture for ANNs and SNNs

SAC: An Ultra-Efficient Spin-based Architecture for Compressed DNNs

SparGD: A Sparse GEMM Accelerator with Dynamic Dataflow

Optimizing the Parallelism of Communication and Computation in Distributed Training Platform

Absorb: Deadlock Resolution for 2.5 D Modular Chiplet Based Systems

A Hybrid Kernel Pruning Approach for Efficient and Accurate CNNs

A Survey of Design and Optimization for Systolic Array-Based DNN Accelerators

Sheng Ma Information

University

Position

___

Citations(all)

859

Citations(since 2020)

410

Cited By

598

hIndex(all)

14

hIndex(since 2020)

11

i10Index(all)

18

i10Index(since 2020)

14

Email

University Profile Page

Google Scholar

Sheng Ma Skills & Research Interests

Computer Architecture

Microprocessor Design

AI Accelerator Design

Top articles of Sheng Ma

Spin-NeuroMem: A Low-Power Neuromorphic Associative Memory Design Based on Spintronic Devices

arXiv preprint arXiv:2404.02463

2024/4/3

EPHA: An Energy-efficient Parallel Hybrid Architecture for ANNs and SNNs

ACM Transactions on Design Automation of Electronic Systems

2024/3/14

Sheng Ma
Sheng Ma

H-Index: 11

SAC: An Ultra-Efficient Spin-based Architecture for Compressed DNNs

ACM Transactions on Architecture and Code Optimization

2024/1/19

Sheng Ma
Sheng Ma

H-Index: 11

Heng Liu
Heng Liu

H-Index: 1

SparGD: A Sparse GEMM Accelerator with Dynamic Dataflow

ACM Transactions on Design Automation of Electronic Systems

2023/11

Optimizing the Parallelism of Communication and Computation in Distributed Training Platform

2023/10/20

Absorb: Deadlock Resolution for 2.5 D Modular Chiplet Based Systems

2023/10/20

A Hybrid Kernel Pruning Approach for Efficient and Accurate CNNs

2023/10/20

A Survey of Design and Optimization for Systolic Array-Based DNN Accelerators

2023/8/25

RHS-TRNG: A Resilient High-Speed True Random Number Generator Based on STT-MTJ Device

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

2023/8/21

Running optimization of deep learning accelerators under different pruning strategies.

Computer Engineering & Science/Jisuanji Gongcheng yu Kexue

2023/7/1

RV16: An Ultra-Low-Cost Embedded RISC-V Processor Core

Journal of Computer Science and Technology

2022/12

Sheng Ma
Sheng Ma

H-Index: 11

Late-Stage Optimization of Modern ILP Processor Cores via FPGA Simulation

Applied Sciences

2022/11/29

Ling Yang
Ling Yang

H-Index: 17

Sheng Ma
Sheng Ma

H-Index: 11

PipeFB: An Optimized Pipeline Parallelism Scheme to Reduce the Peak Memory Usage

2022/10/10

SparG: a sparse GEMM accelerator for deep learning applications

2022/10/10

SADD: A Novel Systolic Array Accelerator with Dynamic Dataflow for Sparse GEMM in Deep Learning

2022/9/24

Optimizing Winograd Convolution on GPUs via Partial Kernel Fusion

2022/9/24

Adaptive Low-Cost Loop Expansion for Modulo Scheduling

2022/9/24

Optimizing convolutional neural networks on multi-core vector accelerator

Parallel Computing

2022/9/1

Stride Equality Prediction for Value Speculation

IEEE Computer Architecture Letters

2022/8/1

A novel systolic array processor with dynamic dataflows

Integration

2022/7/1

See List of Professors in Sheng Ma University(National University of Defense Technology)