Muya Chang
Georgia Institute of Technology
H-index: 11
North America-United States
Top articles of Muya Chang
30.1 A 40nm VLIW Edge Accelerator with 5MB of 0.256 pJ/b RRAM and a Localization Solver for Bristle Robot Surveillance
2024/2/18
E-Gaze: Gaze Estimation with Event Camera
IEEE Transactions on Pattern Analysis and Machine Intelligence
2024/1/29
Muya Chang
H-Index: 4
Arijit Raychowdhury
H-Index: 31
A GaN-Based Reconfigurable Series-Parallel Hybrid Converter Supporting 48/24/12V Input and 0.8-1.2 V Output with 83.7/87.8/90.7% Peak Efficiency
2023/3/19
A 73.53 TOPS/W 14.74 TOPS heterogeneous RRAM in-memory and SRAM near-memory SoC for hybrid frame and event-based target tracking
2023/2/19
A 40nm Compute-in-Memory Macro With RRAM Addressing IR Drop and Off-State Current
IEEE Solid-State Circuits Letters
2023/12/1
A heterogeneous rram in-memory and sram near-memory soc for fused frame and event-based target identification and tracking
IEEE Journal of Solid-State Circuits
2023/8/8
Neuromorphic swarm on rram compute-in-memory processor for solving qubo problem
2023/7/9
A 2.38 MCells/mm2 9.81 -350 TOPS/W RRAM Compute-in-Memory Macro in 40nm CMOS with Hybrid Offset/IOFF Cancellation and ICELL RBLSL Drop Mitigation
2023/6/11
Live Demonstration: Hybrid RRAM and SRAM SoC for Fused Frame and Event Target Tracking
2023/5/21
A 65 nm 1.4-6.7 tops/w adaptive-snr sparsity-aware cim core with load balancing support for dl workloads
2023/4/23
Privacy-by-Sensing with Time-domain Differentially-Private Compressed Sensing
2023/4/17
Stochastic Mixed-Signal Circuit Design for In-sensor Privacy
2022/10/30
Experimental Fault Rate Characterization and Protection in Embedded RRAM
2022/4/27
An analog clock-free compute fabric base on continuous-time dynamical system for solving combinatorial optimization problems
2022/4/24
A 65 nm wireless image SoC supporting on-chip DNN optimization and real-time computation-communication trade-off via actor-critical neuro-controller
IEEE Journal of Solid-State Circuits
2022/3/28
A 40nm 64kb 26.56TOPS/W 2.37Mb/mm2RRAM Binary/Compute-in-Memory Macro with 4.23x Improvement in Density and >75% Use of Sensing Dynamic Range
2022/2/20
A 40nm 60.64 TOPS/W ECC-capable compute-in-memory/digital 2.25 MB/768KB RRAM/SRAM system with embedded cortex M3 microprocessor for edge recommendation systems
2022/2/20
A 40-nm 118.44-TOPS/W voltage-sensing compute-in-memory RRAM macro with write verification and multi-bit encoding
IEEE Journal of Solid-State Circuits
2022/1/21
A 40-nm, 64-Kb, 56.67 TOPS/W voltage-sensing computing-in-memory/digital RRAM macro supporting iterative write with verification and online read-disturb detection
IEEE Journal of Solid-State Circuits
2021/8/9
A 40nm 100Kb 118.44 TOPS/W Ternary-weight Computein-Memory RRAM Macro with Voltage-sensing Read and Write Verification for reliable multi-bit RRAM operation
2021/4/25
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